CDCE6214-Q1: PLL Settings

Dias,

Can you provide your output frequency requirements? We can optimize your design for performance and send you the measured phase noise results.

Thanks,
Kadeem

Hello,

We probably need the two configurations mentioned in the original post : CDCE6214-Q1: PLL Settings adjustment (CP Gain, Lock Window and Loop Filter)

Your colleague recommended a configuration for the loop filter and PLL parameters but we obtain a significant resonance at fvco with the same parameters on PLLplatinium V1.6.9.

The question is, how can we adjust these parameters of PLL on our side ?

Best regards,

Dias,

Please see below for the phase noise plot captured on the bench with the PLL settings I recommended in the previous thread.

I am including our PLLatinum Sim expert in this thread. He should be able to assist with the software. Please note that he is OOO today, so expect a response on Monday.

Best,

Cris