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CDCE6214: Inquiry Regarding CDCE6214RGE Configuration and Features

Dusin Jang
Prodigy 10 points
Part Number: CDCE6214

Tool/software:

Dear TI,

I hope this message finds you well.

We are currently using the CDCE6214RGE clock generator in our design, and we would like to clarify a few technical details regarding its operation and configuration based on the attached schematic.

  1. Based on the currently attached schematic and device configuration, is tri-mode operation available in our current setup?

  2. If we want to switch to I2C mode, what hardware modifications are required on the schematic?

  3. What are the key differences between CDCE6214 and CDCI6214R? Specifically, do both devices support tri-mode operation?

We would greatly appreciate your guidance on the above items.


Best regards,

  • 0
    TI__Mastermind 22430 points

    Dustin,

    1. Are you referring to the fall-back mode page (available for both devices)? What do you mean by tri-mode?
    2. I2C is available on both fall-back mode (REF_SEL and HW_SW_CTRL floating) or EEPROM Page 1 (HW_SW_CTRL pulled to VDD).
    3. The CDCE6214:
      1. Has a fractional PLL instead of an integer PLL
      2. Has LP-HCSL outputs instead of HCSL (integrated termination resistors)
      3. Has support for Spread-Spectrum Clocking (SSC)
      4. Does NOT support LVPECL (LP-HCSL outputs can be AC-coupled for reduced-swing AC-LVPECL)

    Additionally, I would recommend using 1kOhm pull-up resistors to the 1.8V supply for the I2C SCL and SDA. This matches with what is used on our evaluation module.

    Thanks,

    Kadeem