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LMX2572LP: Unexpected Spurs in the LMX2572LP

Part Number: LMX2572LP
Other Parts Discussed in Thread: LMX2594, LMX2572

Tool/software:

There are spurs I observe which isn’t predicted by PLLatinum Sim

There are some spurs that I couldn't find the root causes. I simulated on PLLatinum Sim, I used same registers as TICs Pro software says but I m getting unexpected results. For example, when I configured the PLL to output frequency is 240.02 MHz there are spurs at 100 kHz away from carrier frequency but PLLatium says there is a primary fractional spur at 160 kHz away from carrier frequency if MASH clock distortion is enabled.

My observation is that after the PLL, in the second stage, a spur appears at half of whatever is set after the decimal point.
For example, when it is set to 240.02 MHz, the spur shows up 100 kHz away; when it is set to 240.01 MHz, the spur shows up 50 kHz away — that is, at 5 times the value after the decimal point.
However, this is not the same for every frequency. For instance, at 210.01 MHz the spur is 100 kHz away, while at 215.01 MHz no spur appears. At 220.01 MHz more serious spurs appeared.

What I tried

  • I tried to see significant difference in PLLatium Sim for different output frequencies but I can't see any. 215.01 MHz and 220.01 MHz are almost the same configuration only the fractional N-div values are changing.
  • I tried different register configurations with different MASH orders, MASH seeds and different fractional N-div values. All gave the same result nothing has changed. Only lowering the charge pump current improved the spur level by 6 dBc.
  • Different LMX2572LP gave the same results too.


 
Thanks for helping.

  • Register Configuration for 220.01 MHz calculated by Tics Pro software.

    Reg[125]=0x0820;
    Reg[124]=0x0000;
    Reg[123]=0x0000;
    Reg[122]=0x0000;
    Reg[121]=0x0000;
    Reg[120]=0x0000;
    Reg[119]=0x0000;
    Reg[118]=0x0000;
    Reg[117]=0x0000;
    Reg[116]=0x0000;
    Reg[115]=0x0000;
    Reg[114]=0x7802;
    Reg[113]=0x0000;
    Reg[112]=0x0000;
    Reg[111]=0x0000;
    Reg[110]=0x0000;
    Reg[109]=0x0000;
    Reg[108]=0x0000;
    Reg[107]=0x0000;
    Reg[106]=0x0007;
    Reg[105]=0x4440;
    Reg[104]=0x2710;
    Reg[103]=0x0000;
    Reg[102]=0x0000;
    Reg[101]=0x0000;
    Reg[100]=0x2710;
    Reg[99]=0x8D89;
    Reg[98]=0x0000;
    Reg[97]=0x0000;
    Reg[96]=0x0000;
    Reg[95]=0x0000;
    Reg[94]=0x0000;
    Reg[93]=0x0000;
    Reg[92]=0x0000;
    Reg[91]=0x0000;
    Reg[90]=0x0000;
    Reg[89]=0x0000;
    Reg[88]=0x0000;
    Reg[87]=0x0000;
    Reg[86]=0xFFF7;
    Reg[85]=0xEDFF;
    Reg[84]=0x0001;
    Reg[83]=0xFFF7;
    Reg[82]=0x3DFF;
    Reg[81]=0x0000;
    Reg[80]=0xCCCC;
    Reg[79]=0x004C;
    Reg[78]=0x0001;
    Reg[77]=0x0000;
    Reg[76]=0x000C;
    Reg[75]=0x0940;
    Reg[74]=0x0000;
    Reg[73]=0x003F;
    Reg[72]=0x0001;
    Reg[71]=0x0081;
    Reg[70]=0xC350;
    Reg[69]=0x0000;
    Reg[68]=0x03E8;
    Reg[67]=0x0000;
    Reg[66]=0x01F4;
    Reg[65]=0x0000;
    Reg[64]=0x1388;
    Reg[63]=0x0000;
    Reg[62]=0x00AF;
    Reg[61]=0x00A8;
    Reg[60]=0x03E8;
    Reg[59]=0x0001;
    Reg[58]=0x9001;
    Reg[57]=0x0020;
    Reg[56]=0x0000;
    Reg[55]=0x0000;
    Reg[54]=0x0000;
    Reg[53]=0x0000;
    Reg[52]=0x0421;
    Reg[51]=0x0080;
    Reg[50]=0x0080;
    Reg[49]=0x4180;
    Reg[48]=0x03E0;
    Reg[47]=0x0300;
    Reg[46]=0x07F0;
    Reg[45]=0xC612;
    Reg[44]=0x0863;
    Reg[43]=0x04DB;
    Reg[42]=0x0000;
    Reg[41]=0x0000;
    Reg[40]=0x0000;
    Reg[39]=0x17F3;
    Reg[38]=0x0000;
    Reg[37]=0x8205;
    Reg[36]=0x0023;
    Reg[35]=0x0004;
    Reg[34]=0x0010;
    Reg[33]=0x1E01;
    Reg[32]=0x05BF;
    Reg[31]=0xC3E6;
    Reg[30]=0x0CA6;
    Reg[29]=0x0000;
    Reg[28]=0x0488;
    Reg[27]=0x0002;
    Reg[26]=0x0808;
    Reg[25]=0x0624;
    Reg[24]=0x071A;
    Reg[23]=0x007C;
    Reg[22]=0x0001;
    Reg[21]=0x0409;
    Reg[20]=0x4848;
    Reg[19]=0x27B7;
    Reg[18]=0x0064;
    Reg[17]=0x0096;
    Reg[16]=0x0080;
    Reg[15]=0x060E;
    Reg[14]=0x1808;
    Reg[13]=0x4000;
    Reg[12]=0x5001;
    Reg[11]=0xB018;
    Reg[10]=0x10F8;
    Reg[9]=0x0004;
    Reg[8]=0x2000;
    Reg[7]=0x00B2;
    Reg[6]=0xC802;
    Reg[5]=0x30C8;
    Reg[4]=0x0A43;
    Reg[3]=0x0782;
    Reg[2]=0x0500;
    Reg[1]=0x0808;
    Reg[0]=0x211C;

  • Hi Armagan, 

    I also can see the 10kHz spurs, I don't know where are they came from. 

    At 240.02MHz output

    This spurs can be reduced when we use a smaller output power setting. (OUTA_PWR = 5).

    I measured the output from _P pin and has the _M pin 50Ω terminated.

    Other frequencies you mentioned has similar spur level. 

    At 220.01MHz output, OUTA_PWR = 5

    Here is the configuration file at 220.01MHz.

    R125	0x7D0820
    R124	0x7C0000
    R123	0x7B0000
    R122	0x7A0000
    R121	0x790000
    R120	0x780000
    R119	0x770000
    R118	0x760000
    R117	0x750000
    R116	0x740000
    R115	0x730000
    R114	0x727802
    R113	0x710000
    R112	0x700000
    R111	0x6F0000
    R110	0x6E0000
    R109	0x6D0000
    R108	0x6C0000
    R107	0x6B0000
    R106	0x6A0007
    R105	0x694440
    R104	0x682710
    R103	0x670000
    R102	0x660000
    R101	0x650000
    R100	0x642710
    R99	0x630000
    R98	0x620000
    R97	0x610000
    R96	0x600000
    R95	0x5F0000
    R94	0x5E0000
    R93	0x5D0000
    R92	0x5C0000
    R91	0x5B0000
    R90	0x5A0000
    R89	0x590000
    R88	0x580000
    R87	0x570000
    R86	0x560000
    R85	0x55D800
    R84	0x540001
    R83	0x530000
    R82	0x522800
    R81	0x510000
    R80	0x50CCCC
    R79	0x4F004C
    R78	0x4E0001
    R77	0x4D0000
    R76	0x4C000C
    R75	0x4B0940
    R74	0x4A0000
    R73	0x49003F
    R72	0x480001
    R71	0x470081
    R70	0x46C350
    R69	0x450000
    R68	0x4403E8
    R67	0x430000
    R66	0x4201F4
    R65	0x410000
    R64	0x401388
    R63	0x3F0000
    R62	0x3E00AF
    R61	0x3D00A8
    R60	0x3C03E8
    R59	0x3B0001
    R58	0x3A9001
    R57	0x390020
    R56	0x380000
    R55	0x370000
    R54	0x360000
    R53	0x350000
    R52	0x340421
    R51	0x330080
    R50	0x320080
    R49	0x314180
    R48	0x3003E0
    R47	0x2F0300
    R46	0x2E07F0
    R45	0x2DC608
    R44	0x2C05A3
    R43	0x2B007E
    R42	0x2A0000
    R41	0x290000
    R40	0x280000
    R39	0x270271
    R38	0x260000
    R37	0x250205
    R36	0x240023
    R35	0x230004
    R34	0x220010
    R33	0x211E01
    R32	0x2005BF
    R31	0x1FC3E6
    R30	0x1E0CA6
    R29	0x1D0000
    R28	0x1C0488
    R27	0x1B0002
    R26	0x1A0808
    R25	0x190624
    R24	0x18071A
    R23	0x17007C
    R22	0x160001
    R21	0x150409
    R20	0x144848
    R19	0x1327B7
    R18	0x120064
    R17	0x110096
    R16	0x100080
    R15	0x0F060E
    R14	0x0E1820
    R13	0x0D4000
    R12	0x0C5001
    R11	0x0BB018
    R10	0x0A10F8
    R9	0x090004
    R8	0x082000
    R7	0x0700B2
    R6	0x06C802
    R5	0x0530C8
    R4	0x040A43
    R3	0x030782
    R2	0x020500
    R1	0x010808
    R0	0x00211C
    

  • Thank you for your reply. Your spur levels came out much better than mine. The problem is probably caused by VCO1. I’ll test it by obtaining the same output frequency with the other VCOs. I’ll post the results here.

  • I’m trying to eliminate the spurs by feeding the output of the LMX2572LP into the LMX2594. However, these unexpected spurs are preventing me from doing so. Since the LMX2594 can only accept input up to 300 MHz, I can’t use the other VCOs on the LMX2572LP. The LMX2594 works fine, but the LMX2572LP is causing problems. What could I use instead of the LMX2572LP? Do you have any recommendations?

  • Hi Armagan,

    I tried a couple of devices today but still cannot see the big 100kHz spurs. Do you have any 100kHz source in your system? For example, DC/DC converter.

    Sounds like the function of LMX2572LP is to provide a reference clock to LMX2594. Depending on your phase noise requirement on LMX2594, this architecture is not ideal because the PLL noise from LMX2572 will be carried forward to LMX2594. 

    There are many high performance 1xxMHz XO available in the market. You can use the doubler to make fpd = 2xxMHz.

    You may also consider to use LMK6 BAW oscillator (www.ti.com/.../lmk6c.pdf), if you want a 2xxMHz clock for LMX2594.