LMK04828: Clock & timing forum

Part Number: LMK04828

Tool/software:

500M_64 GSPS.tcs

Dear Team,

We are using the LMK04828B in our design. In this setup, the DCLK frequency is 500 MHz and the SDCLK frequency is 250 MHz. For the 250 MHz signal, we require a pulse instead of a continuous signal. We tested this configuration on the EVM, and it worked as expected. However, on our actual board, while the DCLK is working fine, the SDCLK is giving a continuous signal. When we change the settings to pulse mode, it is not working, and we are not getting the expected signal.

We have attached the .TCS file for your reference.

  • Hi Sarathi,

    I took a look through your configuration file, and it appears a couple of register were set incorrectly. The SYNC_MODE bit must be specifically set for SYNC pin pulser functionality, either through a pin transition (or the SYNC_POL bit) or through SPI programming (see the attached screenshot).

    I have attached two reworked configuration files - one that allows for a pin transition and one that allows for SPI programming to generate SYSREF pulses. You can use either on your actual board, depending on whether you are using the pin transition/SYNC_POL bit or just SPI programming.

    500M_64_GSPS_pulser_SYNCpin.tcs

    500M_64_GSPS_pulser_SPI.tcs

    Thanks,

    Michael