LMK04832: Input Clock Signal Conditioning?

It's not actually possible to satisfy the input slew rate requirement with a 10MHz sine wave, unless it's a clipped sine wave or some other higher slew rate signal. The slew rate of a sine wave is the derivative of its amplitude function, and the peak of that amplitude function is 2π * f * Vpk = about 0.1V/ns for a 10MHz 3.3Vpp sine wave. Our minimum recommended slew rate is 0.15V/ns, and for reasonable reference noise performance you'll want at least 0.5V/ns or better. Refer to https://www.ti.com/lit/an/snaa411/snaa411.pdf for additional details regarding the motivation and benefit of sine-to-square conversion - the app note details performance improvements, but 10MHz on LMK04832 is low enough slew rate that the PLL will appear to sporadically lose lock, or the phase noise will see large random spikes in-band. The app note makes a case for an LVCMOS buffer, but other solutions such as amplifier + clipping limiter could work (provided you trust the noise performance of the amplifier, including under clipping conditions). I've also seen anecdotal evidence of improvement from something as straightforward as a standard 7400-series hex inverter - the noise floor won't be great, but the slew rate will be improved, and above the loop bandwidth the reference floor is less consequential.

There is internal biasing on the LMK04832 inputs (CLKinX and OSCin), including in different CLKinX_BUF_TYPE configurations. You can AC-couple a signal to the node and it will take care of its own biasing, placing the midpoint of the signal at a nominal 1.65V before the amplifier stage (though this has a lot of process and temperature variation).

Inside the CLKinX buffers, there are actually two parallel CML differential amplifiers which can be enabled (mutually exclusive) through CLKinX_BUF_TYPE settings. The Bipolar option selects an amplifier which uses BJTs, and the MOS option selects an amplifier which uses MOSFETs. The choice of BJT or MOSFET impacts the hysteresis - MOS mode can support a modest hysteresis, whereas BJT mode may not. This can be consequential if using CLKin0 as a SYNC source with a 3.3V CMOS signal, and in general is useful for low-frequency CLKinX inputs. The MOS mode hysteresis is also critical to the function of the LOS detector, and LOS detection does not work reliably with Bipolar buffer type. Finally, it's worth noting that both input types can accept DC bias, but Bipolar mode needs to stay within the common mode range of the input (which is undefined in the datasheet and changes over process/temperature, but is generally a ±1.2V window around 1.7V).

If you're AC-coupling a continuous source, choice of bipolar or MOS mode reduces to whether you need LOS enabled. I suggest Bipolar unless LOS is required.

Footnote: there's also two antiparallel series diodes across the input pins, which attempt to limit the magnitude of DC voltage across the amplifier stage inputs to < 1.7V (BiCMOS diodes have slightly higher forward voltage than typical silicon diodes). So if you do end up DC-coupling to the input pins for any reason, be careful not to induce large DC currents through these diodes. When AC-coupled, as long as the datasheet limits on signal swing are observed, this shouldn't be an issue.

Thank you for your response Derek.  Excellent post and very helpful.