LMK01801: Ensuring fixed phase relationship between CLKout12 and CLKout10

Part Number: LMK01801

Tool/software:

Hello,

I am trying to program LMK01801 (testing on LM01801BEVAL) to generate CLKout12 of 250 MHz and CLKout10 of 125 MHz with 500 MHz input clock. I am bypassing input divider and configuring CG3 divider to 4 and CG4 divider to 2. I do get the correct frequencies, but CG4 output has 180 degrees uncertainty relative to CG3. My programming sequence is:

0x000005ef # Unlock
0x48003010 # Reset
0x11309803 # SYNC1 polarity 1, SYNC1_QUAL=3, SYNC1_FAST=1
0x00000001 # Power down 0-7
0x0ca888c2 # Configure outputs 8-13
0x480830c0 # CLKIN1 divide bypass
0x00041005 # CLKout8_11_DIV=4, CLKout12_13_DIV=2
0x11001803 # SYNC1 polarity 0, SYNC1_QUAL=3, SYNC1_FAST=1
0x000005ff # Lock

Is it possible to program LMK01801 to ensure predictable alignment of CG3 and CG4 outputs with 2:1 frequency ratio? If so, what am I doing wrong here?

Thanks,