LMK04832-SEP: Can't save the configuration

Part Number: LMK04832-SEP
Other Parts Discussed in Thread: LMK05318B, LMK04832-SP

Tool/software:

Hi,

This is Dinesh from iWave Global. I have configured the frequencies based on my requirement but if I save and close it means, some configured frequencies are changed. So I can't save my configured clock file. Attached is the frequencies requirement and please let me know how to save clock file without changing the frequencies. Looking forward to the response.

Regards,
Dinesh

  • Hi Dinesh, 
    Are you saying if you save the configuration file (.tcs) and you reload it - your settings are different? 

    If you actually load the file on an EVM - are the raw register settings different? It's possible you may be experiencing a GUI bug but the register content is correct. 


    Best regards, 

    Vicente 

  • Hi Vicente,

    Can you please confirm once that all the above frequencies requirements can be generated by this clock synthesizer? Because the frequencies which I use SYSREF Clock is only changing when I save and load it again. Looking forward to the response.

    Regards,
    Dinesh

  • Hi Dinesh, 
    No, your frequency plan is not feasible. 

    You need all your clocks to have an LCM that falls within the VCO coverage range this device supports. 

    The issue here is the 156.25MHz clock and the 148.5MHz clock. 

    The rest of the clocks can be generated from a 3GHz VCO frequency. 



    You can also use the frequency planner. 

    Only a device that can cover multiple frequencies domains at once like LMK05318B (a DPLL) can do this but our DPLLs are not available in Hi-Rel. 


    Best regards, 

    Vicente 

  • Hi Vicente,

    I have mentioned the frequencies requirements from this LMK04832-SP Part. Please confirm once whether we can generate all the below frequencies or not. I also need to clarify that Whether we can generate the 148.50 MHz from SYSREF and others frequencies from VCO for our below requirements.

    Frequencies Requirements:
    -------------------------------------
    200MHz - LVDS
    148.50MHZ - LVDS
    100MHZ - LVDS
    25MHz - LVCMOS
    24MHz - LVCMOS

    Looking forward to the response.

    Regards,
    Dinesh

  • Hi Dinesh,
    No, your frequency plan isn't feasible due t o the 148.5MHz clock - are you willing or able to change this? 

    Best Regards, 

    Vicente 

  • Hi Vicente,

    We are looking for this same 148.5MHz Clock and can't able to change this.Please share any suggestions to fulfill our requirements.

    Regards,
    Dinesh 

  • Hi Dinesh
    Only option unfortunately is a different kind of device like a DPLL as a jitter cleaner won't be able to produce outputs from two separate frequency domains. 
    LMK05318B might be able to due to. 
    None of our DPLLs are rad-hard though - just a quick fyi. 

    Best regards, 

    Vicente