Tool/software:
Hi, I am taking the reference for a LMK05318B from a GPS unit. This has fairly high jitter: the GPS unit apparently generates an output derived by applying a non-integer divider to a (approx) 32MHz crystal, and so has a jitter of approx 30ns pk-pk.
What are the best practices for dealing with such a situation?
At the moment, I have the DPLL achieving frequency lock but not phase lock, after disabling the early & late window detectors in the TICS Pro wizard. The LMK05318B outputs appear sensible in an oscilloscope, and within the constraints of a 350MHz bandwidth scope, appear to have little jitter.
I've been unsuccessful in getting phase lock, even after increasing the "DPLL phase lock" parameters in the wizard - I note that the wizard advises not to change these.
* Should I worry about the lack of phase lock, and if so what should I do to achieve this? Or should I just rely on the frequency lock flag and ignore the lack of phase lock?
* I can put the DPLL bandwith low, and keep the reference frequency as high as possible (but avoid aliasing), in order to achieve the best jitter filtering.
* Does TI have any other advice for this situation?
Cheers,
Ralph.
