Part Number: LMK5B33216
We need TI’s help on the clock generator which includes JESD204B clocking. We tried the TICS Pro and the Clock Tree Architect. We can’t come up with a solution with the TICS PRO with the proposed devices from the Clock Tree Architect.
Is there another tool?
The parameters
Input clock: 10 MHz
Output clock: 322.265265 MHz, LVPCEL
Output clock: 100 MHz, Single-end 1.8V
Output clock JESD204B: 250 MHz, LVPCEL {Device clock}
Output clock JESD204B: 31.25 MHz, LVPCEL {SYSREF clock}
Output clock JESD204B: 250 MHz, LVPCEL {Device clock}
Output clock JESD204B: 31.25 MHz, LVPCEL {SYSREF clock}
