Hello,
I have an issue with LMK04828B.
once in 10-20 power cycels , i have a PLL not locked , register 0x183 bit 1 = 0.
I suspect the loop filter parameter , can you direct me how to apply the right values.

Thank you,
Amir.
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Hello,
I have an issue with LMK04828B.
once in 10-20 power cycels , i have a PLL not locked , register 0x183 bit 1 = 0.
I suspect the loop filter parameter , can you direct me how to apply the right values.

Thank you,
Amir.
Can you provide the register programming and the frequency provided to PLL2? Without knowing how the PLL is configured, it is not possible for us to say whether the loop filter components are chosen correctly.
Hi,
This is the configuration:

R0 (INIT) 0x000090
R0 0x000010
R2 0x000200
R3 0x000306
R4 0x0004D0
R5 0x00055B
R6 0x000600
R12 0x000C51
R13 0x000D04
R256 0x01000C
R257 0x010155
R258 0x010255
R259 0x010301
R260 0x010402
R261 0x010500
R262 0x010670
R263 0x010711
R264 0x01080C
R265 0x010955
R266 0x010A55
R267 0x010B00
R268 0x010C02
R269 0x010D00
R270 0x010EF0
R271 0x010F10
R272 0x01100F
R273 0x011155
R274 0x011255
R275 0x011301
R276 0x011402
R277 0x011500
R278 0x011670
R279 0x011711
R280 0x01180C
R281 0x011955
R282 0x011A55
R283 0x011B00
R284 0x011C02
R285 0x011D00
R286 0x011E71
R287 0x011F35
R288 0x01200C
R289 0x012155
R290 0x012255
R291 0x012300
R292 0x012402
R293 0x012500
R294 0x012670
R295 0x012755
R296 0x01280C
R297 0x012955
R298 0x012A55
R299 0x012B00
R300 0x012C02
R301 0x012D00
R302 0x012EF0
R303 0x012F50
R304 0x01300C
R305 0x013155
R306 0x013255
R307 0x013300
R308 0x013402
R309 0x013500
R310 0x013671
R311 0x013735
R312 0x013825
R313 0x013900
R314 0x013A00
R315 0x013B01
R316 0x013C00
R317 0x013D08
R318 0x013E03
R319 0x013F06
R320 0x014005
R321 0x014100
R322 0x014200
R323 0x014311
R324 0x0144DD
R325 0x01457F
R326 0x014612
R327 0x01471A
R328 0x014802
R329 0x014942
R330 0x014A02
R331 0x014B16
R332 0x014C00
R333 0x014D00
R334 0x014EC0
R335 0x014F7F
R336 0x015003
R337 0x015102
R338 0x015200
R339 0x015300
R340 0x015401
R341 0x015500
R342 0x015601
R343 0x015700
R344 0x015801
R345 0x015900
R346 0x015A10
R347 0x015BD1
R348 0x015C20
R349 0x015D00
R350 0x015E00
R351 0x015F0B
R352 0x016000
R353 0x016108
R354 0x016224
R355 0x016300
R356 0x016400
R357 0x01654B
R369 0x0171AA
R370 0x017202
R380 0x017C15
R381 0x017D33
R358 0x016600
R359 0x016700
R360 0x01684B
R361 0x016959
R362 0x016A20
R363 0x016B00
R364 0x016C00
R365 0x016D00
R366 0x016E13
R371 0x017300
R8189 0x1FFD00
R8190 0x1FFE00
R8191 0x1FFF53
Thanks,
Amir.
Hi Amir,
Thank you for your patience. Can you try implementing the following loop filters for both PLL1 (first picture) and PLL2 (second picture)?


Thanks,
Michael
HI Michael,
I will try these loop filters ASAP and update.
Also , can you please elaborate if my current loop filters (see above schematics) can cause such behavior of PLL not lock once in 10-20 power up?
Please advice,
Thank you,
Amir.
Hi Amir,
The filter you have instantiated for PLL2 has a slightly smaller BW than we typically recommend (yours is about 180kHz, and we recommend closer to 300kHz for optimizing jitter. This could result in the occasional loss of lock that you are seeing.
Thanks,
Michael