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CDCLVP111-SEP: Worst case jitter

Part Number: CDCLVP111-SEP
Other Parts Discussed in Thread: CDCLVP111-SP

The typical additive jitter foir the CDCLVP111-SEP is 0.125ps.

The max additive jitter is 0.8ps

What factors are responsible for the 0.8ps jitter performance, which is well beyond what we are measuring in the lab? 

What would be the max additive jitter , for an application  running at at  200MHz? 

thanks,

Mark

  • Hi Mark,

    Our typical additive phase jitter spec is 0.125ps with test conditions identified in the datasheet. The max additive phase jitter spec of 0.8ps is a simulated result when the original die was released in our CDCLVP111-SP several years back. When we test the device our results are typical, but note the typical results we are testing are not validated across Process, Voltage, and Temperature (PVT) which factors into the max spec.

    Thanks,

    Michael