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LMK04832: si analysis

Part Number: LMK04832

Dear Team,

I am currently performing signal-integrity (SI) analysis for a design that uses the LMK04832 clocking device. In our application, the corresponding output channel is configured to operate in 1.8 V LVDS mode.

During SI simulation, however, the IBIS model provided for the LMK04832 is interpreted as 3.3 V LVDS, and the tool applies 3.3 V electrical characteristics. Because of this mismatch, the simulation results do not accurately represent the expected 1.8 V LVDS signal behavior.

To proceed correctly with SI validation, I request your guidance on the recommended method to accurately simulate 1.8 V LVDS output behavior using the existing model set or any suggested modeling approach.

Your support on this matter will help us complete the SI analysis with the required accuracy.

Thank you for your assistance.

  • Obulesh,

    I am confused by what you are asking here. LVDS is a standardized driving format that features a 350mV-500mV swing, offset by a common mode voltage that is typically between 0.8-1.2V. 1.8V LVDS and 3.3V LVDS are going to be practically identical in terms of performance. I would recommend simulating with the 3.3V LVDS, and those results should be very similar to the 1.8V LVDS case.

    Thanks,

    Michael

  • Obulesh,

    I am confused by what you are asking here. LVDS is a standardized driving format that features a 350mV-500mV swing, offset by a common mode voltage that is typically between 0.8-1.2V. 1.8V LVDS and 3.3V LVDS are going to be practically identical in terms of performance. I would recommend simulating with the 3.3V LVDS, and those results should be very similar to the 1.8V LVDS case.

    Thanks,

    Michael