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CDCM6208V2G: PLL feedback divider combination

Yoonsun Kim
Expert 1870 points

Part Number: CDCM6208V2G
Other Parts Discussed in Thread: CDCM6208

Hi,

I am working on a clock design using the cdcm6208v2.

When calculating the feedback divider N, I have noticed that there are many combination of PLL feedback Divider 0 and feedback Divider 1.

I need to know if there is a recommended rule or best practice for selecting values for Divider 0 and Divider 1. Is there any priority between two feedback Dividers?

Regards,

  • 0
    TI__Intellectual 2190 points

    Hi, I will get back to you soon with feedback.

    Best,

    Sandra 

  • +1 in reply to Sandra Saba
    TI__Intellectual 2190 points

    Hi Kim,

    Per datasheet first divider should be 200 MHz or less. Furthermore section 9.2.2.3 Configuring the PLL of the datasheet shows the steps to best set up the PLL based on the frequencies required.

    Additionally when using the GUI you can select the "frequency planner" button to enter the configuration and the tool will calculate the default values for you. From there you can tune the values to get the desired output.  

    Best,

    Sandra

  • 0 in reply to Sandra Saba
    Expert 1870 points

    Hi Sandra,

    My goal is to output a user defined frequency from 28MHz to 36MHz through the Y6 channel with a 10MHz OSC connected to SEC_REF. All other output channels are disabled.

    Since Y6 is connected to PS_B, I am planning to use different values for PS_A for feedback and PS_B for output Y6 to optimize the configuration. However, when I use the frequency planner in GUI you linked, the GUI always set PS_A and PS_B to the same value. I would liked to know that these two prescalers are required to be same value or it is possible to set different value for them. 

    Additionally, I am trying to keep the VCO frequency as close to the center as possible. But the GUI often suggests configurations where the VCO is biased toward the edges. If the VCO frequency is within the specification in datasheet but close to the boundaries, is it considered for safe against environmental changes such as temperature?

  • 0 in reply to Yoonsun Kim
    TI__Intellectual 2190 points

    Hi Kim,

    You can set the PS_A/PS_B to different values. 

    The VCO has a range of frequencies, the VCO frequency selection depends on a number of factory most important are the input frequency and the output frequency. These two, among a few other details highlighted in section 8.3.3 VCO Calibration of the datasheet, would determine the frequency of the VCO. 

    As long as the VCO is a valid frequency within the range of the device, range can be found the in EC table in the datasheet, then there should not be any issues using the suggested frequency. As long as the environmental factors remain within datasheet spec you should not face any issues.

    An reason for choosing CDCM6208 over the newer devices we offer? 

    Here's a link to all the latest and hero clock gen devices we offer. 

    Best,

    Sandra