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LMX2595EVM: Boundary Spur Mitigation

Part Number: LMX2595EVM
Other Parts Discussed in Thread: LMX2595, CODELOADER

We using the LMX2595 in the design of a 4 – 8 GHz synthesizer with 1 kHz steps. We need the spurs to be -60 dBc (mostly) i.e. at a small set of frequencies the spurs can be -50 dBc max.

 

Our design is trying to utilize the FPD modification to reduce the boundary spurs as suggested by the data sheet, but we are not successful.

 

Could you please provide some technical assistance in understanding our results below and our interpretation of spurious avoidance?

 

 

LMX2595 Boundary Spur Testing

 

We are working with the LMX2595 evaluation PCB and the TICS Pro software.

Attached are three spectrum analyzer plots and the associated TICS Pro settings.

We are supplying a 100MHz reference source to the evaluation PCB.

 

1) 7000MHz Spectrum Analyzer Eval Board

 

7000MHz Settings Eval Board

 

We set it up to output 7000MHz with only the input doubler activated in the reference chain, i.e. PFD = 200MHz.

Both the phase noise and spurious look good.

 

 

2) 7000.1MHz Spectrum Eval Board

 

7000.1MHz Settings Eval Board

 

We then offset the frequency by 100KHz, with all other settings except the NUM=1 being the same.

 

This produced serious spurious components in the spectrum.  We understood and expected this to be boundary spurious as 

7000.100MHz Mod 200MHz = 100KHz

 

 

3) 7000.1MHz Spectrum Analyzer 240 Ref Eval Board

7000.1MHz Settings 240Ref Eval Board

 

Our intent in production is to deal with the boundary conditions by changing the input reference chain as discussed in the data sheet.

We changed the PFD to be 240MHz by setting the input doubler = 2, PreR = 5, Multiplier = 6

We adjusted N=58, NUM=1435234903,  and DEN=4294967291 to achieve 7000.100MHz output.

In this case 7000.100MHz Mod 240MHz = 40.100MHz which is quite far outside the boundary condition of the loop filter.  However, we still see the same poor spurious performance.

 

We did also review your technical note snaa289 and downloaded the CodeLoader software.  However, the LMX2595 is not supported by CodeLoader.

 

I look forward to your response.

 

Best regards,

Richard Scheer

  • Hi Richard,

    By definition, IBS refer to the interaction between fpd and fvco. In your example, fpd = 200MHz, fvco = 14000.2MHz, so the beat frequency and the IBS is 200kHz.

    Now if we change the fpd to 240MHz using the R divider and MULT, the IBS should be moved to 80.2MHz. Unfortunately the reference clock frequency is still 100MHz, crosstalk between input clock and VCO will also create spurs at multiple of 100kHz. Furthermore, 100kHz or 200kHz is also the fractional spurs generated from the fractional engine. 

    In order to get -60dBc spurs, the loop filter bandwidth has to be very small so that the fractional spurs can get attenuated. IBS, however, is a kind of crosstalk spurs, it cannot be filter out by the loop filter, the amplitude of IBS depends on the chip layout and design, and also on the input signal format. For a PLL with integrated VCO device, crosstalk is unavoidable so IBS is never good. Discrete PLL + VCO can resolve the crosstalk issue. 

    CodeLoader is the older version GUI, TICS Pro do the same thing with faster response and better interface.

  • Thank you very much for the clear answer to my question.