Part Number: LMX2572
Hello Support team,
we are debugging a new application using 8 LMX2572 and we noticed that changing the output power register introduce a phase offset. Is this normal?
The pll is set to produce 2400MHz.
Second question
In my undertanding writing the Mash seed register introduce a phase offset in the output of the PLL that can be used to create 2 or more coherent outputs. When I need to change the frequency i.e. from 2400 to 2463 i have to:
- Set the PLL regiters
- Recalibrate the VCO (Writing R0)
- trigger the sync signal (Cat3 sync)
Do I also need to reset the mash seed by writing the register to start the new frequency with a predefined phase of the signal? In my case all sources shall be maintaned coherent.
Thank you