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LMK5B33216: LMK5B33216 synchronization on request

Part Number: LMK5B33216

Hello,

I would like to use LMK5B33216 as a main clock generator as it seems to cover all functionality that I need but there is one area which is not fully covered in the datasheet so I am not sure if it is possible or not.

In the design I need:

  • true ZDM between reference clock on the input and multiple outputs (5x [f_out=2x f_in] + 1x [f_out=10x f_in]) - checked.
  • additional outputs to replicate reference clock for sync_out even if main reference clock is not connected (f_out=f_in) - checked
  • single pulse SYNC after everything is ready and on later request.. 4-5 LVDS for ADCs and FPGAs - TBC


I would like to have an option to trigger SYNC by forcing GPIO state or by writing a bit in a register and propagate this signal to mentioned 4-5 LVDS outputs.
In the datasheet there is the section 8.3.13 SYSREF/1PPS Output describing dividers and the ability to output the signals on a group of OUTx - not all, but 4-5 LVDS outputs should be available. It seems to be about continuous clock, i.e. some clock of OUTx with additional divider forms a continueous OUTy sync.
No mention about single pulse on request... but for GPIO replica of SYSREF there is a note:

"The GPIOx replicated SYSREF output is after static digital delay but before the analog and digital delay and pulser. The output is a continuous frequency as pulsed SYSREF mode is not supported for the GPIOx replica."

which can be understood that for OUTx pulse is possible but for GPIO replica it is not.
I have checked the TICS Pro software and in the SYNC/SYSREF/1-PPS section the droplist SYSREF Mode: None/Continuous/Pulser exist with additional Pulser count.
Does it confirm that mentioned OUT0/1, OUT4/5, OUT6/7, OUT8/9, OUT10/11, OUT12/13 can be used as SYNC pulse output when SYSREF Mode=Pulser and Pulse count = 1? -> Single pulse on request or X pulses on request repeated with frequency defined by the additional divider (SYSREF Divide)?

With SYSREF resampling selected I guess it will be additionally synchronized with the clock, ie. if pulse on GPIOx input is not aligned properly? 

The SYSREF_REQ_SW option in SYSREF control section probably confirms that it is possible to trigger such pulses on request via serial interface, please correct me if I am wrong.

And the last thing - sync request on a GPIO.. In the GPIO area of TICS Pro for GPIOx the option "SYSREF_REQ, Can request SYSREF pulses..." can be selected from the droplist. I guess that when combined with SYNC_EN and the Pulser it triggers the pulse, right?

Could you please confirm that? 

  • Hi Ireneusz, 

    Like you mentioned, you can configure any of the SYSREF outputs in pulser mode to send single pulses on request. If the pulser count = 1, then each SYSREF request signal will trigger one pulse on the output and the pulse width will be equivalent to a half-cycle of the SYSREF clock frequency. I do recommend enabling SYSREF resampling as this helps ensure that the pulsed SYSREF outputs are aligned with the other clock outputs. 

    That is also correct that if SYNC_EN = 1 and GPIO are properly configured, you can also use GPIO to issue a SYSREF request and trigger a pulse. Let me know if you have any questions on this. 

  • Hi Connor,

    Thank you for the confirmation and the additional note about the pulse length - it might be useful.

    For now, I mainly wanted to confirm the configuration options described. If I have any further questions in the future, I'll get back to you. Have a good day!