This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK04828-EP: power down mode

Part Number: LMK04828-EP
Other Parts Discussed in Thread: LMK04828,

The LMK04828 data sheet states a power down supply current of only 1-3mA. But to me it's not clear how this mode actually can be entered - at least in the TICS Pro power calculation setting the 'powerdown' flag (under Mode Control) won't make any difference in total consumption.
Or is this just a bug in TICS ?

  • What has to be done in order to achieve this 'power down' supply current of only 1-3mA ?
  • Is just setting the 'power down' bit (bit 0 @ reg.2) sufficient ?
  • Or do additional power down bits of the different internal components (like mux, PLL, divider, etc) have to be set in addition ?
  • Can an external TCXO, connected to OSC_IN+/-  still run during LMK power down mode or should it be disbled too?
  • At least in TICS Pro it's never possible to achieve such a low consumption - even if everything has been disabled or set to power_down - is this a TICS bug?

Thank you for your help!
Markus

  • You're the first person who asked about the TICS Pro current calculator and the POWERDOWN bit. Indeed, TICS Pro current calculator does not accurately reflect the power consumption of the device when the POWERDOWN bit is set. For that matter, the GUI makes an effort to dim the fields related to subsystems that are powered down by other register settings, and setting the POWERDOWN bit does not dim anything even though in principle it should. We could do better representing the effects of setting the POWERDOWN bit. This is something we can address in a future TICS Pro update.

    Merely setting the POWERDOWN bit (register 0x2 value | 0x01) is sufficient to achieve the power down supply current of 1-3mA. The POWERDOWN bit supersedes all other power control bits for other subsystems, so while setting those other bits can affect the power consumption after the POWERDOWN bit is cleared, they have no effect while the POWERDOWN bit is set. Clocks connected to CLKinX or OSCin can continue to run, and digital inputs including the SPI bus can continue to operate normally - the POWERDOWN bit configures the LMK04828-EP into a state where the analog inputs are biased but inactive, the analog outputs are tri-stated, and most digital inputs are powered but inactive (SPI and certain internal digital functions still work). So there should be no problem leaving an external TCXO connected to OSCin and still running while the POWERDOWN bit is set.