LMX2492: LMX2492 - precise ramp synchronization / triggering

Part Number: LMX2492

Hello,

after reading the datasheet and some discussions in this forum I'm a bit confused about achieving precise and deterministic synchronization with LFM waveforms. 

In my application I can control timing of TRIG signals in relation to the reference input (OSCin) clock. But I need either deterministic triggering of the LFM waveform (even +/- 1 PFD cycle of uncertainty is not acceptable) or precise knowledge of FLAGs timing, so I can unambiguously tell which reference clock cycle (I assume using PFD frequency equal to the reference frequency) was the last one in the ramp.

So the following questions arise:

  1. What are the timing requirements for TRIG signals to achieve deterministic start of the ramp? Are they sampled in relation to PFD, or any other clock derived from reference input? What are the setup and hold times?
  2. What is the delay for setting of ramp FLAGs? 
  3. If I needed to use MOD pin for ramp clock (I would prefer to avoid it), what would be the timing requirements I would need to meet in order to achieve deterministic ticks? I mean I would like to avoid uneven ramp steps due to the increments being updated in +/-1 PFD cycle intervals. So are the MOD pin transitions sampled by the PFD clock, or some other clock? What are setup and hold times?

Thank you in advance!

 

Best regards,

Krzysztof

  • Hi There,

    Unfortunately we don't have the timing information you need. 

    The trigger signal is sampled w.r.t. the phase detector frequency.

  • Ok, thank you! 

    So assume I will be able to find proper timing for TRIG signal to be sampled deterministically. Is there any internal delay between sampling TRIG signal and actual start of the ramp? May I assume that this delay is a constant number of PFD cycles for a given configuration?

    Do you expect achieving deterministic trigger timing to be possible at 125 MHz PFD frequency, or I may need to go down with PFD frequency?