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LMH1981: HSync jitter issue under open termination & question about allowable DC offset before AC coupling

Part Number: LMH1981

Hi all,

My customer is using LMH1981MTX/NOPB as a sync separator in our product and would like to clarify some input-related specifications.

(Background)

We observed the following behavior:

)Jitter (~70 µs on HSOUT) occurs when the video input is not terminated (open condition)

)The issue appears only with tri-level sync formats (1080/25p, 24p, 23.98p)

)The issue does not appear when the input is properly terminated with 75 ohm

)The behavior is reproducible across multiple signal sources

In addition, we found that:

)Adjusting the DC offset voltage before the AC coupling capacitor at VIN eliminates the issue

This suggests that input DC conditions and termination may affect the device operation.

(1) Allowable DC offset before AC coupling

We could not find a clear specification in the datasheet regarding the allowable DC offset range before the coupling capacitor.

Could you clarify:

)Recommended or allowable DC offset range at the input (before AC coupling)

)Any constraints related to proper operation of the sync slicing or clamp circuit

(2) Internal clamp behavior

We would also like to better understand the input clamp:

)What is the typical VIN clamp voltage and its variation?

)Are there any limitations or operating conditions where the clamp may not function correctly?

)How sensitive is the device to DC offset when processing tri-level sync signals?

 (3)Operation without proper 75 ohm termination

Since the issue appears only when the input is open:

)Are there any restrictions or limitations when operating without a 75ohm termination?

)Is proper termination required to guarantee correct sync extraction, especially for tri-level sync?

 

Based on our observations, we suspect that the issue may be related to the interaction between input amplitude, DC offset conditions, and the internal sync slicing mechanism.

Any clarification or design recommendations would be greatly appreciated.

Best Regards,

Ryusuke

  • Hi There,

    The input 75Ω shunt resistor should always exist, device performance is not guaranteed without the shunt resistor.

    We don't have the DC offset specification, we recommend use DC-coupled video source with a 1µF capacitor and a 75Ω shunt resistor.

    For clamp and sync, can the information in the datasheet answer your questions? We don't have additional information other than the datasheet.

  • Hi Noel,

    1) Thank you for your answer.
    The data sheet says “50% Sync Slicing for Video Inputs from 0.5 VPP to 2 VPP.”
    When inputting 2 V p-p, there is no 75 ohm shunt.

    In other words, Without 75 ohm shut = 2.0Vp-p, With 75 ohm shut = 2.0Vp-p, With double 75 ohm shut = 0.5Vp-p.
    Could you please answer with Without 75 ohm shut = 2.0 Vp-p?

    2)If using AC coupling, the DC component included in the input signal
    There is no problem if the following conditions are satisfied, right?
    (1)When the input is turned on/off, the voltage applied to the VIN pin must not exceed the absolute maximum rating range
    (2)When the input is turned on, the START-UP TIME condition described on page 12 of the data sheet must be accepted
    (3)When the offset voltage changes, the following conditions described on page 12 of the data sheet must be observed
    (6) Maximum voltage offset between 2 consecutive input horizontal sync tips must be less than 25 mVPP.

    Best Regards,

    Ryusuke

  • Hi There,

    1) When input signal is 1Vpp with 75Ω termination, then the voltage becomes 2Vpp (without termination) or 0.5Vpp (with 37.5Ω termination).

    2) Correct.

  • Hi Noel.

    I understand that the important points are as follows:

    4)The maximum voltage offset between 2 consecutive input horizontal sync tips must be less than 25mVp-p.

    I reconfirmed that the maximum Sync Tip voltage deviation per 1 line at 1080/25p input is about 17.2 mV.

    The condition of "Maximum voltage offset between Sync Tips of 2 consecutive input horizontal synchronizations is less than 25mVp-p" described in the data

    sheet is not exceeded. However, the actual signal includes analog noise components.

    Should I consider this 25mVp-p condition as an absolute maximum value that should not be exceeded even for a moment? Or is it correct to understand that

    the average Sync Tip voltage deviation should be less than 25 mVp-p?

    (Waveform measurement results are attached)

    In addition to the above Sync Tip offset condition, is there any restriction regarding Vertical Sag (V Sag) itself?

    In the case of 1080/25p, the vertical sync period is 5 lines.

    Considering only the 25mVp-p condition described in the data sheet, it can be interpreted that a V Sag of approximately 25 mV × 5 lines = 125mVp-p is

    acceptable for the entire vertical sync period.

    However, this time, a problem occurred when a V Sag of approximately 63 mV (approximately half of 125 mV) occurred.

    Therefore, apart from the voltage deviation between 2 consecutive Sync Tips, how much mV should the voltage deviation for the entire vertical sync period be

    limited to?

    Best Regards,

    Ryusuke

  • Hi There,

    Unfortunately, I don't have the knowledge to answer your questions. Our team is not specialized in video.

    Apologies we are not able to help.