Part Number: LMK1D1204
Other Parts Discussed in Thread: LMK04832
Hi TI Team,
I am using the LMK1D1204 with a single-ended LVCMOS clock input. In my design, the LVCMOS signal is connected to IN− (N) and the bias voltage is applied to IN+ (P). The datasheet recommends connecting the signal to IN+ and the bias to IN−.
Could you please clarify:
1) Is this input configuration supported or expected to operate reliably?
2) Will the LVDS outputs simply be inverted (180° phase shift), or are there any other functional or performance implications?
3)The LVDS outputs are connected to the LMK04832 LVDS inputs. Is there any concern with this configuration?
Could you please Reply as soon as possible??
Thank you for your support.

