Part Number: LMX1860-SEP
Hi,
We observe bizarre behavior with LMX1860-SEP. As soon as the SYSREF_EN pin is asserted hi, the device outputs pulses to VCC on its SYSREF output channels. The pulses are not valid LVDS or CML pulses -- the two polarities (P & N) move together, rather than complimentarily (see scope shot). This is before any SPI Configuration whatsoever. Furthermore, the device will do this without a valid clock signal on clk_in P / N. To make matters worse, the device seems to not accept any SPI configuration with SYSREF_EN asserted hi. We have probed VCC -- it is stable at 2.5V. Our logic signals (SYSREF, MUXOUT_SEL, etc) are all 1.8V logic.
Any guideance on this issue is greatly appreciated!






