LMX2485: Output Instability

Part Number: LMX2485

HI,

Could you please reply to the following thread? I am having trouble with this issue and would like to solve it. I would appreciate it if you could reply soon.

https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1670527/lmx2485-output-instability

Best Regards,

Nishie

  • Hi There,

    Were you saying that you used the Vcc of the VCO as the trigger to the test equipment? You were turning the VCO on/off in order to trigger the test equipment?

    Would you try use the LE pin to trigger the test equipment? 

  • Hi Fung-san

    https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1670527/lmx2485-output-instability

     Why can't you reply to my post?

    I don't understand why it is ignored.

    Regarding your question, your understanding is correct. It measures the time to stabilize at startup.

    What is your intention to control with LE?

    Best regards,

    Higa

  • Hi There,

    Open multiple post on the same subject is not recommended, you can reply your post if you did not get a respond. 

    When measuring the pll/vco lock time, you should keep the loop working and stable, and then program the PLL to change frequency. No one can predict the loop respond if you have the VCO powered down before programming.

  • Hi Fung-san

    I understand.

    However, I posted repeatedly, but there was no reply, so I was worried that it might not have been received, so I posted another message.

    I will check if the stability problem at startup is affected by the LE control.

    Can you judge from the LE waveform?

    Best regards,

  • Hi There,

    LE is one of the programming pins, you can use it to trigger the test equipment.

  • Hi Fung-san

    Sorry for the delay as it took a long time to get the waveform.

    I got the waveform about the timing of VH2 and LE.(Please refer to the "LE signal" tab in the Excel document.)

    As the time has passed, I gathered the information in the document for the reminder.

    The LE signal was triggered about 500us after the activation of VH2.

    How does the triggering of LE relate to the time until the PLL output stabilizes?

    The initial inquiry is as follows, please answer.

    [Inquiry]
    • Why does the frequency fluctuate after it has converged?
    • Could you advise how to suppress the fluctuation (within ±5 kHz)?

    Best regards,

    DH

    LMX2485SQXNOPB_Inquiry_No1.xlsx

  • Hi There,

    I have a couples of question.

    Did modulation start 50us after programming?

    The timing plot shown register R0, did the customer already program R1 to R4?

    Can the customer capture the waveform of VCO control voltage (set the scope to 0.2V or smaller /div), VCO signal and LE. Use VH2 to trigger the scope.

  • Hi Fung-san

    The customer request has a time to lock less than or equal to 30us. We are considering whether this request can be cleared.

    -Did modulation start 50us after programming?

    ->Is "programming started" when the MPU starts outputting synth data and clock?

       Is "modulation started" when the frequency changes immediately after LE output?

       In the customer's MPU setting, 1 clock =0.21 μs, 24bit data write, 1bit wait, 1bit LE output, total 26bit Therefore, LE is output after 26bit×0.21 μs=5.46 μs from programming start.

    -The timing plot shown register R0, did the customer already program R1 to R4?

    -> R1-R4 registers are written during system start-up. (IF side frequency setting)

    Only R0 register is written after system start-up. (RF side frequency setting)

    -Can the customer capture the waveform of VCO control voltage (set the scope to 0.2V or smaller /div), VCO signal and LE. Use VH2 to trigger the scope.

    -> Please refer to the attached Excel file for the data.

    LMX2485_DATA.xlsx

     

    Best regards,

    DH

  • Hi support team.

    Can you help me?

    Best regards,

  • Hi 

    I have an additional quesion.

    Does PLLutinum assume an LE signal as the start of the simulated Fout stabilization time?

    Does PLLutinum assume that the LMX2485 and VCO are powered on at the same time?

     

    If the VCO is powered on after the LMX2485, the Fout stabilization time is actually faster or slower than the simulated time.

    I think this is because the state of the phase comparator inside the LMX2485 is indeterminate when the VCO is off. Is this correct?

    Best regards,

    DH

  • Hello support team.

    Can you reply ASAP?

    Regards,

  • Hi There,

    Your data is from the IF side, did you mean you have lock time problem on both RF and IF sides?

    "IF-side control" is the tuning voltage to the VCO, it should be a trace (shown as green in below) on the scope. Your plot, however, shown it is a AC-signal.

    "start time of the control-voltage" varies, I believe is due to the VCO.

    PLL simulation is based on the circuit and configuration, it would not consider the SPI timing or whether the VCO is power up before or after the PLL. 

  • Hello Fung-san

    I thought that the reason why the IF side control signal was an AC signal was that the VCO was not stable immediately after the VCO power was turned on, so I changed the VCO power supply to always be active.

    As a result, the AC signal was no longer observed.

    As for the last question, the time until the IF control signal (LMX2485) starts the sequence to lock the VCO varies greatly.

    Is this a characteristic of the LMX 2485?

    I thought that the LMX2485 starts the lock sequence as soon as the VCO oscillates.

    Best regards,

    DH