LMK03806

Jason,

The output will be only as good as the reference you use for the PLL.  Therefore, in order to achieve the +/- 20 ppm at the output the reference must be at least this good.  This would likely mean that the customer would need to consider using a TCXO or better for their reference.

Jon

Hi Jon,

The equation 5 in D/S indates the error caused by PLL.  If fpd=40M, PLL_DLD_CNT=10000, then ppm = 29.6. 

Did I misunderstand something?

Best Regards,

Jason

Jason,

This equation describes an accuracy for the Digital Lock Detect - it allows the user to "set the frequency accuracy required by the system before a digital lock detect event occurs."  This would affect the ppm of the output signal.

Regards,

Jon

Jon,

So if the input clock is ±20ppm, and the settings are the same as my second post,  the output accuracy would be 49.6 ppm in total?

Thanks,

Jason

Jason,

One of my previous posts had an incorrect statement.  The accuracy setting of the digital lock detect as described in the equation discussed would NOT affect the accuracy of the output.  It only affects the accuracy at which a digital lock detect event occurs.  So in regards to you previous statement the accuracy on the output would still be the +/- 20 ppm of the reference clock.

Regards,

Jon