LMK1C1104: Recommended single-ended clock buffer

Part Number: LMK1C1104

Are there any chips that feature a single-ended clock buffer similar to the LMK1C1104, but deliver a minimum output swing exceeding 1.62 V under a 1.8 V power supply? Note that 0.8×1.8 V (VDD) equals 1.44 V, which is less than 1.62 V. The output voltage is required to be higher than 1.62 V, otherwise the device cannot operate normally.9ad7e8646d17cc4dc6f493c2427ccfc1.png

  • Hello,

    What is the required VOL level? If the minimum VOH level needs to be 1.62V or higher, you can AC couple and rebias the output to achieve that. Rebiasing to just above VDD/2 (i.e. use a voltage divider with 40Ohms pulling up to VDD and 60Ohms pulling down to GND) will work for this. The only thing is that it will bring the VOL levels up by about 180mV.

    Thanks,

    Michael