CDCP1803: LVDS Input Coupling Options - AC-coupled or DC-coupled Support

Part Number: CDCP1803

Hi Team,
A customer is asking for clarification regarding the differential inputs of the CDCP1803 clock buffer/divider.
Specifically, they want to know whether the inputs support AC coupling or DC coupling when driven by an LVDS signal.
 
Could you please clarify the input stage structure and confirm if external biasing or termination is required for each configuration?
Best regards,
Tony Liu
 
  • Hi Tony,

    This part supports DC coupling when driven by an LVDS signal, so long as the bias is within the specification of the Electrical Characteristics table, there should be no issue (100Ohms differential termination is always required at the receiver for an LVDS input). It also has an externally generated bias voltage (VBB) that can be used to bias the midpoint of an LVDS signal (i.e. you can terminate the signal with 50Ohms from the P and the N to VBB), so while you cannot directly input an AC coupled signal into the device, a bias voltage is provided.

    Thanks,

    Michael

  • Hi Michael

    So you mean I can follow Figure 9, but just replace the Cac capacitor with a 0-ohm resistor, right? Please help me confirm the specific connection method.