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AC Coupling of LVDS clock signal

Newton
Expert 1125 points
Other Parts Discussed in Thread: DAC3152

 

I am Refering to TI's application report titled "AC Coupling Between Differential LVPECL, LVDS, HSTL and CML signals" . Here is link to it:

http://www.ti.com/lit/an/scaa059c/scaa059c.pdf

 On  page 7, Figure 11,  it is  showing LVDS to LVDS AC coupling,

I have couple of questions on this:

(1) Should not the two caps be on right hand side of the 100 Ohm termination resistor? I thought, LVDS standard requires a DC current loop with return path to the transmitter (even when AC coupled). If 100 Ohm resistor is on left hand side of two caps, then DC has return path via resistor.

May be my understanding is not right. Can some one clarify?

regards

 

 

  • 0
    Mastermind 7395 points

    I don't have an answer. I only would like to add another question. In the mentioned figure 11, the transmission line is drawn before the AC coupling. Many standards, including ATCA, require AC coupling before going to the backplane (before most of the transmission line). How would the terminations be in that case?

  • 0
    TI__Genius 17340 points

    Newton,

    I believe this is related to the question about the input clock of the DAC3152/62 from the high speed data converters forum. I am not completely familiar with the LVDS standard so I cannot comment on what is required as far as DC loops... For signaling, I'm not sure that AC coupling would be part of the standard anyways, since there is no lower limit for switching frequency, meaning that a '0' could be sent infinitely which would be blocked by AC caps.

    For an LVDS clock, we know that we have a constant switching frequency, so the AC caps will always look like shorts. To me, there shouldn't be any difference between the two cases, mainly because there isn't a constant current between the LVDS pins. If the standard does call for a DC current loop, then yes, place the 100 ohm resistor before the AC caps. It shouldn't hurt either way. An LVPECL output, on the otherhand, requires a DC path to ground because LVPECL uses current sourcing outputs. I believe LVDS uses a push-pull architecture.

    Regards,
    Matt Guibord

  • 0 in reply to Matt Guibord
    Mastermind 7395 points

    Hi Matt,

    As far as I know, the LVDS driver has an "H bridge" type output stage. This H bridge connects a constant current source in one or another direction over the 100 Ohm resistance. So in principle, I would expect that the current source must have also a DC path.

    On the other hand, some standards demand that Serdes lines are AC coupled at the source, so in that case it would be impossible to put the termination before the capacitors. I guess that, as you said, in data communications, LVDS clock and data sources constantly change so the issue of DC path is less relevant.