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Termination between LMK03806 and HCSL receiver in DC coupled operation

Other Parts Discussed in Thread: LMK03806

When LMK03806’s CLKouts are used as the inputs of HCSL receivers,  what are the termination for DC coupled operation?

  • Hi Ted,

    What is the differential signal you’re trying to interface to the HCSL receiver’s input?  HCSL receivers typically expect 0 mV to 700 mV single-ended swing with Vcross at 50% Voh. 

    HCSL reference: http://download.intel.com/design/Pentium4/guides/24920601.pdf -- See Table 4.1: AC Timing Requirements from one of Intel's spec (pg. 24).  Note that this shows Intel’s driver output specs.  HCSL receiver input specs may have some guard-band and may vary between devices/manufacturers.

    SSTL reference: http://www.ti.com/lit/an/scba014/scba014.pdf

    HSTL reference: http://www.ti.com/lit/an/scaa062/scaa062.pdf

    Regards,

    Alan

  • -----------------------------------------
    Email from Ted Xu:

    Hi Alan
    Thanks for your great supports.
    Since LMK03806’s CLKout can be configured LVDS or LVPECL, do you think which one  is better?
    For LVDS and LVPECL drivers , what are the terminal between drivers and HCSL receivers?
    Thanks again.

    -----------------------------------------
    My reply:

    Hi Ted,

     I’d choose LVPECL16 since LVDS may not have enough swing for an HCSL receiver's input.  It should be ac-coupled as explained/shown below.

    I don’t really understand this question:  “For LVDS and LVPECL drivers , what are the terminal between drivers and HCSL receivers?”  If you're referring to termination, then the LVPECL-HCSL interface circuit above takes care of both common mode shifting and load termination (471 || 56 = 50 ohms, place close to HCSL inputs).

     Regards,
    Alan