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CDCE62005 - SPI use after Power Down

Richard Marsh
Intellectual 760 points
Other Parts Discussed in Thread: CDCE62005

Hi,

The CDCE62005 data manual says that after power down is de-asserted that the contents of the EPROM are copied into the RAM registers.  Does this mean I have to wait for a specified time after exiting power down before I can write to the RAM registers via the SPI bus? i.e. so that I don't write to the registers while they're being written to by the EPROM reads.

I cannot find any such requirement mentioned in the data manual.

The Power_Down pin places the CDCE62005 into the power down state . Additionally, the CDCE62005 loads the contents of the EEPROM into RAM after the Power_Down pin is de-asserted; therefore, it is used to initialize the device after power is applied. SPI_LE signal has to be HIGH in order for EEPROM to load correctly during the rising edge of Power_Down.

Cheers,

Richard

  • 0
    TI__Guru* 81035 points

    Hi Richard,

    We already discussed this through email, but for some reason my E2E post never went through. Reposting the answer:

    No wait time should be needed since the EEPROM load to the registers will stop when the SPI_LE pin is low. We have never seen a customer have any problems with writing too early after power-up.

    Best regards,

    Matt