I proposed the CDCLVP1204 for below requirements:
1:4 buffer,
LVPECL input and outputs,
Diff output swing: 250-2000mv,
Output rise/fall: max 200ps
Very low phase jitter (less than 0.1ps
I got the below question:
I'm having trouble to understand the jitter performance.
I have a requirement for phase jitter (12KHz-20MHz) of max 0.63ps RMS (on 156.25MHz clock).
Do you have information about the product phase jitter?
Do you think it meets the my requirements?