CDC7005 and CDCM7005

derrick davies

Other Parts Discussed in Thread: CDCM7005, CDC7005

A question about TI’s CDC7005 and CDCM7005 clock synthesizer and jitter cleaners. For both devices listed, is there a time required after deassertion of NRESET to when the SPI interface is active? In other words, how long do we have to wait after releasing the device from reset until we can program it through the SPI interface?

over 13 years ago

0 Leandro_z over 13 years ago

TI__Expert 3985 points

Hi Derrick,

let me cross check with designer and I will back to you.

Regards,

Leandro

0 Leandro_z over 13 years ago in reply to Leandro_z

TI__Expert 3985 points

Hi Derries,

you mentioned actually the RESETn pin. \While RESETn being low, the SPI interface is still active; only the CP will be in 3-state, the internal dividers will be reset to 0 and the outputs will have a static 0 or 1. The SPI interface will be shut-down only if the PDn is pulled low.

Best regards,

Leandro

Clock & timing

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CDC7005 and CDCM7005