One question on the AUX_IN input:
http://www.ti.com/lit/an/scaa096/scaa096.pdf states that the AUX_IN is a third reference input that targets applications that need a backup or holdover function.
The same application note also mentiones XTAL1 and XTAL2 pins, which are not mentioned in the CDCE62005 datasheet.
Now coming to the point:
In our application we have set
PRISEL = 1
SECSEL = 1
AUXSEL = 1
EECLKSEL = 1
Synthesizer source indicator bit indicates that Primary Input is used.
So far, so good...
When we probe the AUX_IN pin with a passive probe while the CDCE62005 is locked to the primary input, we see that none of the output clocks is in phase with the primary input anymore and the PLL_LOCK pin transits to LOW.
QUESTION: What other internal purposes (except being an input to the SMART MUX) does the clock at AUX_IN serve?