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PLL suggestion

Joe Jacob
Prodigy 10 points

Other Parts Discussed in Thread: LMK00301, LMK04100, LMK04906, LMK03002, LMK04806, CDCE62005, CDCM6208

I'm looking for a clocking solution:

Requirements:

Two 10 MHz reference inputs (LVTTL single ended) with input select signal.

Output 100 MHz (low jitter) - Need to distribute to 20 LVPECL endpoints

No software to program, so I need to use a CPLD to program.

Any suggestions?

  • 0
    TI__Mastermind 28031 points

    Joe,

    20 LVPECL outputs is a lot.  I would consider using two of the LMK00301 10 output LVPECL buffer that is pin control (no programming necessary).

    If you want jitter cleaning, consider a device such as the LMK04906 or LMK04100.   If you have a clean clock already that does not need jitter cleaning, try the LMK03002.

    Another approach might be to use a device with more outputs and only one LMK00301, such as the LMK04806 and only 1 LMK00301 buffer.

    Regards,

    Dean

  • 0 in reply to Dean Banerjee
    TI__Expert 3985 points

    Hi Joe,

    in addition to the good proposals from Dean you may like to consider also the CDCM6208 as well as the CDCE62005 as clock generator. Both devices can work as Jitter Cleaner and Clock Synthesizer. The former has better performance and less power consumption while the latter has an EEPROM embedded.

    Regards,

    Leandro