Hi,
There are some issue with SEC CMOS input. It works, if signal is applied to negative pin(#3) when configured as LVCMOS buffer. Also, with LVDS signal on SEC input is inverted. So , I guess pin 3 is SEC_REF+ and pin 2 is SEC_REF-. Markings on the chip we are using are: CDCE 18005 TI OAJ PCY4 G4 Can you please confirm that all chips have pins 2 and 3 functionality swapped? It's important for project, as there will be data transfer and invention will affect data.
Thanks in advance for your help.
