TI Pro-Clock divide values

Craig Hillis

Other Parts Discussed in Thread: CDCE913

I downloaded TI Pro-Clock 1.2 and it generates very large divide values. The values do not match the ones in the example on the CDCE913 data sheet. The calculator keeps wanting to reset to its values.

I want to use a 10MHz external oscillator as an input and generate a 26MHz output. I should be able to have M=1, N=130 and Pdiv=5. This would give a fVCO of 130MHz, well within the data sheet specs.

Why does this seam to be a problem?

over 13 years ago

0 Julian Hagedorn over 13 years ago

TI__Mastermind 20900 points

Hello Craig,

to get a better phase noise performance from the CDCE913 the TI ProClock will help you to find the best divider values. In general the phase noise performance is better as higher the internal VCO frequency and as higher the divider values.

as a suggestion you could let the VCO run at 208 MHz and us Pdiv=8.

If your main concern is power consumption you should use the lowest possible VCO frequency (like VCO=104MHz and Pdiv=4).

Best regards,

Julian

0 Craig Hillis over 13 years ago in reply to Julian Hagedorn

Intellectual 480 points

When I run TI Clock Pro with 10MHz as fin and 26MHz as the output and select LVCM for input I get an error:

Fin caused values out of range(80MHz - 230MHz) in some PLLs:

-Fvco_1 PLL1. is out of range

When I click the Try Again button the error goes away.

0 Craig Hillis over 13 years ago in reply to Craig Hillis

Intellectual 480 points

Also, when I save a setup that uses LVCMOS is the input, when I reload that setup the input is reset to crystal.

0 Julian Hagedorn over 13 years ago in reply to Craig Hillis

TI__Mastermind 20900 points

Hello Craig,

we have put those issues into our ToDo list and we are working on it to solve it. Up to now, please enter your desired VCO frequency directly in the PLL and select your output divider: e.g. 130MHz PLL1 Frequency with Pdivx=5.

best regards,

Julian

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TI Pro-Clock divide values