The CDCEL913 Datasheet lists EEcyc (Programming Cycles of EEPROM) as 100 (MIN) and 1000 (TYP). I am not sure how to interpret this in the context of EEPROM endurance.
The standard way of specifying EEPROM endurance is by specifying a MINIMUM number of programming cycles - this is guaranteed number of programming cycles that can be executed without affecting device reliability.
Following this, caan I take it that the CDCEL913 onboard EEPROM is guaranteed for 100 programming cycles only, with the 1000 typical number being irrelevant when taking a worst case design view?
Any help on this would be greatly appreciated.
Thanks and regards,
Paul Meaney