LMK0480x - Differential Clock Output Duty Cycle

Hi Katsunaga,

The duty cycle is 50% for all kinds of output and divider values.

Hello,

Thank you for your fast reply.

But, I would like to know the accuracy of the duty cycle.

For example, Minimum duty cycle is 45%, Typical duty cycle is 50%, Maximum duty cycle is 55%.

Regards,

Hiroshi Katsunaga

Hi Katsunaga,

Typical is 50%, I need to check with the apps team to see if we have characterized data to specify min. and max. value.

Hi Noel,

Thank you for your reply.

Please check it.

My costomer needs the specifications.

I wait for your fast reply.

Regards,

Hiroshi Katsunaga

Hi Katsunaga,

Checked with the team, we don't have data on min. and max. value.

What is the desired freq and format? Maybe we can do some test for you.

Hi Noel,

Thank you for your fast reply and proposal.

I show the desired freq and format below.

They will use LMK04808B.

(1) freq = 1GHz, format = LVDS (Output Divide Ratio = 1/3)

(2)freq = 1GHz, format = 700mVpp LVPECL (Output Divide Ratio = 1/3)

(3)freq = 1GHz, format = 1200mVpp LVPECL (Output Divide Ratio = 1/3)

(4)freq = 250MHz, format = LVDS (Output Divide Ratio = 1/12)

Please do the characterization.

I will wait for your reply.

Regards,

Hiroshi Katsunaga

Hi Noel,

Thank you very match for your fast reply.

My question was solved.

Best Regards,

Hiroshi Katsunaga