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LMK03806 IBIS simulation problems

Other Parts Discussed in Thread: LMK03806, CDCLVP1208

Hello, I am doing an IBIS simulation in hspice between the CDCLVP1208 and LMK03806 I/O buffer models using differential LVPECL signaling. The CDCLVP1208 simulates beautifully but the output buffer of the LMK03806 looks "horrible" and only outputs a 1000mVpp signal with the 2000mVpp setting which is not recoverable by the CDCLVP1208. I am trying to drive the CDCLVP1208 with the output of the LMK03806. Right now I have the output of the LMK03806 2000mVpp driver terminated with 150-ohms and ac-coupled to the input of the CDCLVP1208 termination component which has it's own 50-ohm termination. As you can see by the plot below there the LMK03806 output doesn't appear to have a proper pull down. I'm not sure what's going on and would really appreciate some help on this issue. Below is the hspice code I am using to generate these plots. Thanks for any help anyone can give!

*CDCLVP111RHB Simulation

* input source
v1 in0_p 0 pulse ( 0V 1V 1p 1p 1p 499p 1n )
v2 in0_n 0 pulse ( 1V 0V 1p 1p 1p 499p 1n )
v1a in2_p 0 pulse ( 0V 1V 1p 1p 1p 499p 1n )
v2a in2_n 0 pulse ( 1V 0V 1p 1p 1p 499p 1n )

vvdd vdd 0 3.3V

B_OUT_LVPECL2P0_P pu0_p pd0_p out0_p in0_p pc0_p gc0_p
+ file = 'lmk03806.ibs'
+ model = 'LVPECL2P0'
+ typ=typ
+ power=on
+ buffer=2
+ interpol=1

B_OUT_LVPECL2P0_N pu0_n pd0_n out0_n in0_n pc0_n gc0_n
+ file = 'lmk03806.ibs'
+ model = 'LVPECL2P0'
+ typ=typ
+ power=on
+ buffer=2
+ interpol=1


RC1 out0_n 0 150
RC2 out0_p 0 150
C1 out0_n out0_n_a 0.1u
C2 out0_p out0_p_a 0.1u

RT1 out0_n_t out0_n_a 50
RT2 out0_p_t out0_p_a 50

R1 out0_n_t term_out 50
R2 out0_p_t term_out 50

B_TERM pc_term gc_term term_out
+ file = 'cdclvpx.ibs'
+ model = 'VAC_REF'
+ typ=typ
+ power=on
+ buffer=17
+ interpol=1


B_IN_ECL_P v2p51 01 out0_p_t out1_p
+ file = 'cdclvpx.ibs'
+ model = 'INPUT'
+ typ=typ
+ power=on
+ buffer=1
+ interpol=1

B_IN_ECL_N v2p52 02 out0_n_t out1_n
+ file = 'cdclvpx.ibs'
+ model = 'INPUT'
+ typ=typ
+ power=on
+ buffer=1
+ interpol=1


B_OUT_ECL_N pu2_n out2_n in2_n pc2_n gc2_n
+ file = 'cdclvpx.ibs'
+ model = 'PECL_OUT'
+ typ=min
+ power=on
+ buffer=12
+ interpol=1

B_OUT_ECL_P pu2_p out2_p in2_p pc2_p gc2_p
+ file = 'cdclvpx.ibs'
+ model = 'PECL_OUT'
+ typ=min
+ power=on
+ buffer=12
+ interpol=1


r5t out2_p out2_p_t 50
r6t out2_n out2_n_t 50
r5 out2_p_t 0 50
r6 out2_n_t 0 50

vv2p5 v2p5 0 2.5V
vv1p3 v1p3 0 1.3V
vv1 v1 0 1V
vv2 v2 0 2V

.tran 1p 4n
.option post

.end

  • Hello,

    Per the LMK03806 IBIS model notes:

                    -LVPECL simulation recommendation:
                      It is recommended that a small (1nF or less) AC coupling cap
                      be used. Larger values will result in long settling times 

    Does using smaller cap fix the simulation result? 

    Regards,
    Alan

  • Thanks for your reply Alan,

    Cap sizes doesn't seem to change the result. 

    The problem appears to be resulting from the "VAC_REF" termination model from the CDCVLP1208 chip.

    My understanding is that the termination is supposed to provide a common-mode reference that can be terminated by a 50-ohm resistor but the output node for the termination is following the signal on the other end of the resistor. In any case, when I provide my own reference everything starts looking good.

    Thanks for your help.

  • Joseph Crop said:
    but the output buffer of the LMK03806 looks "horrible" and only outputs a 1000mVpp signal with the 2000mVpp setting

    Keep in mind, that 2000 mVpp is when considered differentially, so two 1000 mVpp single ended signals = 2000 mVpp differentially.

    73,

    Timothy