CDCE72010 VCOX INPUT selection issue

Hello Yaoting,

our understanding of the configuration of the switches for LVPECL operation is correct. All switches should be closed. You will achieve this when switch P and N are set to 1 and switch INV is set to 0.

Setting INV to 0 will disable its function and close the switch. Setting INV to 1 will bias the negative input pin to VBB. This is useful if you have only a single ended LVPECL signal. (please see the note on page 52 under figure 22). Furthermore the AC coupling bit must be set to 0 (register1 bit 0) to enable the VBB volgate source.

Best regards,

Julian

Hello Julian,

Thanks for your reply, but I'm still confused. I want to configure differential, DC LVPECL coupling. I'm not sure I'm reading the data sheet correctly:

Fig. 22 on page 52 the lower right table entitled "VCXO Input Buffer Settings" says switches P, N and INV are closed when bit 8.1 is set to 1.

On the same figure, from the larger table on the left I select the third row for LVPECL, DC input, Internal termination. But it says bit 8.1 is cleared to 0.

Which is right? I cleared it according to the big table on the left and it seems to work. But I'm still worried that I'm missing something and will cause

problems down the line.

Yaoting

Hello Yaoting,

bit 8.1 will not declare, if the switches are open or not. The bits 8.0 and 8.1 need to be set accordingly, which input signal type you want to use:

Bit 8.2 will set AC (8.2=0) or DC (8.2=1) termination.

Bit 8.3 will set the input hysteresis: 0 = disabled; 1 = enabled

Bit 8.4 will set the internal termination (switch N,P): 0 = internal termination enabled (switches closed); 1 = internal termination disabled

Bit 8.5 will control the INV switch as i explained before.

more information about the registers can be found in the register table on page 32.

==> Your setting, row 3 from the big table, is correct. the table on the left hand side only explains how to set bit 8.4/8.5 to close/open N,P,INV.

Best regards,

Julian