• State
  • Locked Locked
  • Replies 4 replies
  • Subscribers 21 subscribers
  • Views 341 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK04906 CLKin_Sel_INV

Tomohiko Sugiyama
Intellectual 815 points
Other Parts Discussed in Thread: LMK04906

Hi

Please let me confirm some questions about LMK04906 CLKin_Sel_INV.

In order to enable CLKin_Sel_INV, I should take special steps?

Regarding to the Datasheet of LMK04906 on page P27, Method:Configuring Pin Select Mode
　"The polarity of Status_CLKin1 and Status_CLKin0 input pins can be inverted with the CLKin_SEL_INV bit."

I have set as follows according to the data sheet, but I did not have the expected results.

　Status_CLKin0 = 1
　Status_CLKin1 = 1
　LD_MUX = 0x10(PLL1 R/2)
　CLKin_Select_MODE　= "011"（Pin Select mode）
　CLKin_Sel_INV　　　= "1"

　⇒I confirmed "Status_LD = High(fix)".
　 　I was expecting to confirmed ""Status_LD = CLKin0/R ".

Please refer to the Appendix.

Best Regards,
Tomohiko Sugiyama

  • 0
    TI__Genius 10320 points

    Hi Sugiyama-san,

    Your conclusions are correct. Inverting the CLKin pins from 11 to 00 result in CLKin0 being selected. CLKin0 will then be seen on the LD output pin when the mux is set to PLL1 R/2. I have confirmed this in the lab on our EVM.

    Gabe

  • 0 in reply to Gabe Ayala
    Intellectual 815 points

    Hi Gabe-san

    Thank you very much for the prompt reply !

    I found that recognition is correct.

    Currently,I set CLKin_Select_MODE　= "000"（Manual mode）,CLKin0 will then be seen on the LD output pin when the mux is set to PLL1 R/2.

    Is there the association in "CLKin_Select_MODE" and "CLKin_Sel_INV" ?

    Can I have a register your settings ?

    I want to compare my register settings.

    Best Regards,

    Sugiyama




  • 0 in reply to Tomohiko Sugiyama
    Intellectual 815 points

    Hi Gabe-san

    I confirmed the setting my EVB ,but The result is not in line with expectations.
    Please refer to the Appendix.

    Please let me confirm some questions.

    Q1:Are there any condition for set up case1~3.
    The result has shown that switching of CLKin was not going well.

    Q2:Can I set Holdover condition to CLKin0 select condition ?

    Best regards

    Sugiyama

    2500.CLKin_Sel_INV.pdf

  • 0 in reply to Tomohiko Sugiyama
    Intellectual 815 points

    Hi


    Our customer is in trouble.
    They need to complete their evaluation by this week.
    Please help us on this item.

    ①Can LMK04906 change CLKin by "CLKin_Sel_INV" at "Pin select mode" ?

    I didn't confirm that CLKin was changed by "CLKin_Sel_INV = 1" at "Pin select mode".

    ②Can I have a register your settings ?

    I want to compare my register settings.

    Best Regards,

    Sugiyama