CDCE72010 not locked

Yaoting Yang

Other Parts Discussed in Thread: TLK10002, CDCE72010

The following is the setting,

Primary reference input is AC LVDS 50MHz; VCXO is 500MHz DC LVPECL; PFD run at 100KHz;

Loop filter is as same as the one on TLK10002 EVB board.

Related registers' setting, R=2, P=20, M=N=250.

I can see waveforms of channel 2 output as well as reference input by a scope. Only channel 0 and channel 2 are designed to output.

The loop is not locked. Is there anyone who can help? I have been stuck there for several days. Very appreciate any helps!

Yaoting Yang

0 Yaoting Yang over 12 years ago

Still no answer, still been stuck!

What i mean in last post the circuit is not locked because the Locked pin indicates the logic low.

Any helps will be great appreciated!

Yaoting Yang

0 Julian Hagedorn over 12 years ago in reply to Yaoting Yang

Hello Yaoting,

could you please send me the complete configuration file (generated with the CDCE72010 GUI)?

Can you also share the VCXO gain [Hz/V]?

Thanks and best regards,

Julian

0 Yaoting Yang over 12 years ago in reply to Julian Hagedorn

Hi Julian,

I have no idea about CDCE72010 GUI. What is it?

The parameters are:

Ref. freq=50MHz; R=2; M=250

VCXO: freq=500MHz; FB=20; N=250, pull range=100ppm;

Pump current =3mA

The registers setting is,

e82c0070
69800221
eb860002
68400003
68400004
68400005
68400006
68400317
684000d8
69000049
03e40f9a
80000fbb

Hoping it is useful to you.

Very appreciate your helps.

Yaoting

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