This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Synchronizing clocks between two LMK00308 Clock Buffers

Other Parts Discussed in Thread: LMK00308, LMK00301

I would like to gang two LMK00308 clock buffers to drive 16 sychronized clocks. I am planning to use REFout(LVCMOS) clock output from the first buffer to drive the OSCin input of the second buffer. What is the best way to connect these two signals, considering that the 2 clock buffers exist on separate boards, and this reference clock has to travel a very short distance between the 2 boards via a high-speed connector?

Thanks,

PEter

  • Hello,

    I would recommend using LMK00301 on first board and then use one of the differential output clocks from LMK00301 (10 outputs total) to drive the LMK00308 on the second board.  This will give best performance.

    Is there are reason you would not take this approach?  The synchronized REFout signal will only be driving the second board, so the first board would still be susceptible to early clock turn off glitch.  Since these are simple fan-out buffers, the phase relationship between all clocks would be the same even if REFout is not used.

      - In fact not using the LVCMOS REFout will improve phase variation between board 1 and board 2  over temperature as figure 20 of LMK00308 datasheet shows more variation in prop delay for the REFout than the other differential formats.

    73,

    Timothy

  • Timothy,

    Thanks for the suggestion, I will do as you recommend. When connecting clock output pins of LMK00301 to CLKin0 inputs of LMK00308, I am planning to insert two 0.1uF caps between each transmitter and receiver. Page 22 of LMK00308 datasheet says that when driving a differential receiver, a 100 Ohm resistor needs to be inserted between P and N differential lines unless the differential receivier already has a built-in 100 Ohm resistor.

    So my follow-up question is - does the LMK00308 CLKin0 receiver have a built-in 100 Ohm resistor? My goal is to minimize component count, ideally I would like to just use 2 caps per clock pair (and no resistor).


    Thanks,

    PEter

  • Peter,

    LMK00308 does not have internal 100-ohm termination resistor, so you will need this externally.

    Regards,
    Alan

  • Thanks Alan,

    PEter

  • Hi Alan,

    It actually turns out that the receiver for the LMK00301 clock outputs (Xilinx Kintex480T Transceiver Ref Clock input) does have internal termination as shown in Figure34b on page 23 of LMK00301 datasheet.

     Is the 100OHm resistor really neccessary for source termination? Another chip we are looking at ( Si5326) doesn't require a source termination resistor (see typical application circuit on page 17 of their datasheet). What would happen if the source termination resistor was omitted?

    Thanks,

    PEter

  • Hi Peter,

    The DC-termination is needed to insure proper DC biasing and startup of the LVDS output driver.

    What is the minimum input swing supported by Kintex 480T MGTREFCLK input?  To insure we use common nomenclature, note that input swing for a differential signal can be specified as single-ended swing (VID = |VIH - VIL|) or differential pk-pk swing (VPP = VID x 2 = |VCLK_P - VCLK_N|).  I'm OK with either, if you can specify which one is used in Xilinx's spec.

    Can you confirm that the MGTREFCLK input requires external AC-coupling?

    From the datasheet:
    "If a self-terminated receiver requires input swing greater than 250 mVpp (differential) as well as AC coupling to its inputs, then the LVDS driver with the double-terminated arrangement in Figure 34 (b.) may not meet the minimum input swing requirement; alternatively, the LVPECL or HCSL output driver format with AC coupling is recommended to meet the minimum input swing required by the self-terminated receiver."

    Regards,
    Alan

  • Hi Alan,

    The dedicated differential reference clock input pair MGTREFCLKP/MGTREFCLKN is internally terminated with 100Ohm differential impedance. The common mode voltage of this differential reference clock is 0.8V nominal. I am confirming that the MGTREFCLK input requires external AC-coupling.

    The minimum input swing supported by Kintex480T MGTREFCLK input (VIDIFF) is 250 mV peak-to-peak. 

    Am I reading you correctly - are you saying that  the LMK00301 LVDS driver always needs a 100Ohm resistor to insure proper DC biasing and startup of the LVDS output driver? When driving a receiver with internal 100OHm differential termination, this resistor and 2 caps should be close to the driver, and when driving  a receiver without 100Ohm differential termination, this resistor and 2 caps should be close to the receiver?

    Our goal is not to use the 100OHm resistor, to reduce part count - is that possible?

    Thanks,

    Peter

  • Hi Peter,

    Yes, the LMK00301's (LMK0030x family) LVDS driver needs 100-ohm load with DC path between the differential outputs.  This is the termination per LVDS standard, which does not have AC termination AFAIK.  The potential risk of using LMK0030x LVDS outputs with AC-termination only (i.e. no source-side DC-termination) is that the driver's P and N output signals can be "in-phase" for some period after driver power-/start-up since the current-mode switch box drivers do not have the 100-ohm differential load with DC connection for proper output biasing.  This temporarily in-phase output waveform upon startup and/or startup latency before "normal" (complementary P and N) output phases are achieve may not be tolerated by the receiver device, so I generally recommend against using LMK0030x's LVDS outputs with termination through AC coupling caps.

    When using LMK0030x LVDS outputs to drive a receiver with AC coupling, the 100-ohm source termination should be nearest to the driver, the 100-ohm load termination should be nearest (or internal) to the receiver, and the AC coupling caps may be located between the two termination resistors at either driver or receiver end (whichever makes more sense in the application).

    The LMK00301's LVDS output with double-termination can meet the 250 mV pk-pk spec for MGTREFCLK input.

    Regards,
    Alan

  • Alan,

    Thanks for the explanation, we will use DC connection with a 100-ohm resistor to drive the output of one LMK to the clock input of the second LMK.

    But  I have to use A/C coupling between LMK clk outputs that are driving Xilinx clk inputs (because Xilinx GTX transceiver receivers have 0.8V common mode voltage vs 1.2V required by LVDS). I  will use 100-ohm termination near the LMK and AC coupling caps close to the Xilinx FPGA. Since double terminated LMK output  drive 300mV, and the GTX input requires 250mV, there is only 50mV buffer which is not very much. To increase the output drive,  would it be OK to change the external 100-ohm termination resistance to something like 200-ohm?

    Regarding the startup issue, other chips like Si5326 don'd seem to have the startup issue when using A/C coupling - is this something specific to LMK00301? We would like to use the TI chip in this TI development platform, but if the above is not going to work, we need to know for sure one way or the other - is it OK to use LMK00301 as described above?

    Thanks,

    Peter

  • Hi Peter,

    Yes, you could use a 500-ohm or even 1kohm (instead of 100-ohms source termination) to establish a DC path on the LMK0030x's LVDS outputs to reduce the startup issue and avoid attenuation of the LVDS output swing.

    Regards,
    Alan

     

  • Alan,

    Thank you very much, I will use 510-ohm for source termination

    Peter