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Clock Design Tool for LMX2581

Frank Ziegler
Prodigy 60 points

Other Parts Discussed in Thread: LMX2581

I have two issues with the design tool. I just downloaded the latest version. I want two outputs from the LMX2581 but I can't get the tool to give more than 1. I set OscIn to 12.8, out1 to 2457.6 and out2 to 204.8. The tool complains it can't find a solution till I drop the second output.

I then check the total phase noise as 265.1fs. If I change the jitter low frequency to 1Hz, the jitter goes to 576.8fs. I then customize the OscIn phase noise which is better than the default, see below, and the phase noise jumps to 4.2ps and the blue line for OSCin doesn't reflect the numbers I just entered. Why?

@ 1 Hz offset - -60 - dBc/Hz

@ 10 Hz offset - -98 - dBc/Hz

@ 100 Hz offset - -126 - dBc/Hz

@ 1 KHz offset - -143 - dBc/Hz

@ 10 KHz offset - -151 - dBc/Hz

@ 100 KHz offset - -152 - dBc/Hz

@ 1 MHz offset - -155 - dBc/Hz

  • 0
    TI__Mastermind 28590 points

    Hello Frank,

    Yes, I'm afraid that the 1 output is a current limitation which impacts part selection as you observe.

    However, for the simulation / loop filter design purposes, you can simply change the divider between 1 (2457.6 MHz) and 12 (204.8 MHz).  For loop filter design, it does not matter what the output frequency is, just the VCO frequency.  However if using the 'auto calculate loop bandwidth' feature, it is important to have the actual reference noise loaded.  So after loading your OSCin noise profile, you may want to recalculate your loop filter to achieve optimum jitter in an integration bandwidth including the loop bandwidth.

    As for jitter integration limits.  If you look in the E2E files section of this forum, you'll see a file called "Choosing Loop Bandwidths for PLLs."  Towards the end are a few slides about choosing jitter integration limits.  Please also refer to this presentation.

    More directly, jitter is the integration of phase noise.  The clock design tool uses a what-you-see-is-what-you-integrate approach, so if you are interested to see your phase noise at 1 Hz, it's ok to set that limit, but know that your jitter will be significantly higher, if you are checking the part against a jitter spec, you need to enter the Xmin/Xmax associated with that spec, for example 12 kHz to 20 MHz is a common industry standard and is now like a benchmark.  I think the default range in the tool is 1 kHz to 10 MHz.

      - Note, noise below 10 Hz is considered to be wander, not jitter.

      - As you have observed, typically noise close to the carrier is dominated by the reference, the OSCin block in this case.  The reason the phase noise numbers you enter for OSCin are not the same which you see in the blue line is because the OSCin noise has been scaled to your final output frequency.  Suppose your reference is 122.88 MHz... The value you entered, say -60 dBc/Hz, is now scaled by 20*log10(2457.6 MHz / 122.88 MHz) = 26 dB.  So at 2457.6 MHz, your OSCin noise is at -34 dBc/Hz.

    Hope this helps.

    73,

    Timothy