Hi :
I want to use 40MHz reference clock to generate 160MHz and 40MHz clock, I use cdce62005 v1.4.5 GUI to find out proper setting, according to it, my register setting is as below:
#define reg0 0xe9020320
#define reg1 0xe9020321
#define reg2 0xe9140302
#define reg3 0xe9020303
#define reg4 0xe9020334
#define reg5 0x50000ff5
#define reg6 0x900e02e6
#define reg7 0xbdc07be7
after writing these register, I write again register 6 with value 0x940e02e6 to calibrate the VCO.
The problem is it can't lock to the reference clock every time, some times it just generate a 140MHz none-locked output, have no idea how to debug it. Before I tried to use a dirty 125MHz reference to generate a clean 125MHz and succeeded without any problem, so the interface to the cdce62005 should be OK.
I doubt it's because of the loop filter, the current setting is provided by "Loop filter simulator", but I don't know how to debug, anyone can help me check the setting ?
Thank you very much in advance.
Best regards!