Hi,
On the CDCLVC1310,
1. If XTAL input is not used, what should be with the XIN and XOUT pins? I suspect the answer is to tie XIN low and leave XOUT unconnected.
2. If driving PRI_INP and SEC_INP with LVCMOS, can PRI_INN and SEC_INN be left unconnected since they are internally biased to VDD/2? Would adding a small bypass cap to PRI_INN and SEC_INN be recommended to squelch noise at those nodes?
Regards,
Jeff
