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0-delay mode problem in LMK04806

Other Parts Discussed in Thread: CODELOADER

Hi, I am trying to use the 0-delay mode in LMK04806B. My setup is:

CLKin: 40 MHz

VCO: 80 MHz

Feedback: CLKout8

The 0-delay mode seems to work only when CLKout8 frequency matches the VCO frequency (80 MHz). However, I would like CLKout8 to output 40 MHz with 0-delay relative to CLKin input. As soon as I program CLKout8 for 40 MHz, all outputs become not synchronous to CLKin, Lock Detect signal disappears.

Shown below is the project file for CodeLoader, if someone wants to try this.

thanks.

[SETUP]
ADDRESS=888
CLOCK=4
DATA=2
LE=6
PART=LMK04806B
PINPOSITION00=1
PINPOSITION01=7
PINPOSITION02=5
PINPOSITION03=10
[MODES]
NAME00=R0 (INIT)
VALUE00=2148925760
NAME01=R0
VALUE01=1311680
NAME02=R1
VALUE02=1311681
NAME03=R2
VALUE03=1311202
NAME04=R3
VALUE04=1311683
NAME05=R4
VALUE05=1075052580
NAME06=R5
VALUE06=1311045
NAME07=R6
VALUE07=286326790
NAME08=R7
VALUE08=286326791
NAME09=R8
VALUE09=286326792
NAME10=R9
VALUE10=1431655753
NAME11=R10
VALUE11=2432850314
NAME12=R11
VALUE12=335613963
NAME13=R12
VALUE13=453771372
NAME14=R13
VALUE14=587367021
NAME15=R14
VALUE15=33554446
NAME16=R15
VALUE16=2147516431
NAME17=R16
VALUE17=3243574288
NAME18=R24
VALUE18=88
NAME19=R25
VALUE19=46777369
NAME20=R26
VALUE20=2410151962
NAME21=R27
VALUE21=335569947
NAME22=R28
VALUE22=1099804
NAME23=R29
VALUE23=25166109
NAME24=R30
VALUE24=33554718
NAME25=R31
VALUE25=2031647
OSCIN00=40
EXTRA_PLL_N_DIV_1_00=1
OSCIN01=80
EXTRA_PLL_N_DIV_1_01=1
PINS=513
[BURST]
COUNT=0

  • Hi,


    The desired VCO frequency is out of range for the in-chip VCO, (2370 - 2600 MHz). Are you using an external VCO? If you could give a desired frequency plan, we could configure the chip in the appropriate 0-delay mode.

    Gabe

  • Hello Gabe,

    the VCO frequency is 2560 MHz, well within the range. See attached screenshot.

    The plan is:

    CLKin: 40 MHz

    external VCO: 80 MHz

    internal VCO: 2560 MHz (feel free to modify if needed)

    CLKout8: 40 MHz, 0-delay with CLKin,

    CLKout9: 40 MHz 

    all other CLKout outputs: 640 MHz

    CLKout8 and CLKout9 should be fed from OSCin input

    all other CLKout outputs fed from internal VCO

    If you could create a CodeLoader file and send it to me, that would be great.

    thanks.

  • Hi,

    Sorry for the misunderstanding in terms. When using 0-delay, the feedback pack still goes through PLL1-N divider. Since the PFD for PLL1 is expecting VCOfreq/N and CLKout8 freq = VCOfreq/2 the PLL1-N divider needs to be adjusted accordingly.

    Gabe

  • Hello Gabe,

    yes, it works now. A bit confusing though - I had to set 40 MHz VCO frequency in PLL1 window, even though it's 80 actually. Could be good to rework that software so it shows the 0-delay feedback properly.

    Anyway, thanks a lot for your help.