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the configuration of CDCE62005 on C6678 board.

Other Parts Discussed in Thread: CDCE62005

Hi,

I know that many questions have been posted about CDCE62005. Still, I want to post my own.

I tested the configuration parameter that provided my TI ,they comes :

Then , the two CDCE62005 can generate all kinds of clocks like 312.5M,100M,66.667M on my C6678EVM board. 

Unfortunately , when I changed some divider parameters, the CDCE62005 can't generate the clock frequency that I want . Here is one of my configuration parameter  table :

What I supposed to get is 25M clock in the U0 channel ,62.5M clock in the U2 channel and 156.25M clock in the U3 channel , where  the input for the CDCE62005 is 25M crystal  in the AUXIN pin. However, the result is U0=25M,

U2 = 54.3M,U3=136M , then I tried to change Reg7 to FD00_37F7, the output keeps unchanged.  How could this happens? Could you please help me to figure out the parameter ?

Best regards.

Philly.

  • Hi Philly,

    I've attached a register config file for you 5444.checksum.INI . From what I could tell, the Prescalar was set to 4 instead of 3 and I've change the input Mux to select only the Aux input. Also, your register settings were set to lock the EEPROM (which may have been done by default).

    I have not adjusted the Loop Filter but if you need assistance I'd be glad to help.

    To enable a calibration routine, toggle bit 22 (ENCAL) in R6. This should lock the device.

    Gabe