I am working with LMX2581 and I have an issue with the lock of the synthesizer
Below is the register information
VTune is 0 or 3V depending on the CP polarity.
Application: Fout: 1.6GHz with best phase noise (lowest noise).
The LMX2581 EVM schematic on page 10 was followed carefully
Any ideas are really wellcome??
//Foscin = 25MHz
_Ti_LMX2581_synth->setId(0); // ID = 0 (Register Readback Mode)
_Ti_LMX2581_synth->setFracDither(3); // FRAC_DITHER = 3 (Dithering Disabled)
_Ti_LMX2581_synth->setNoFcal(0); // NO_FCAL = 0 (VCO frequency calibration done upon write to R0 register)
_Ti_LMX2581_synth->setPllN(128); // PLL_N = 128
_Ti_LMX2581_synth->setPllNum(0); // PLL_NUM = 0
_Ti_LMX2581_synth->setCpg(31); // CPG = 15 (Charge Pump Current = 15X)
_Ti_LMX2581_synth->setVcoSel(0); // VCO_SEL = 0 (VCO1 - VCO calibration starts at lowest frequency)
_Ti_LMX2581_synth->setFracOrder(3); // FRAC_ORDER = 3 (3rd order PLL delta sigma modulator)
_Ti_LMX2581_synth->setPllR(1); // PLL_R = 1
_Ti_LMX2581_synth->setOsc2X(0); // OSC_2X = 0 (OSCin frequency doubler disabled)
_Ti_LMX2581_synth->setCpp(1); // CPP = 1 (Negative Charge Pump Polarity)
_Ti_LMX2581_synth->setPllDen(1); // PLL_DEN = 1
_Ti_LMX2581_synth->setVcoDiv(0); // VCO_DIV = 0 (VCO divider value = 2)
_Ti_LMX2581_synth->setOutBPwr(0); // OUTB_PWR = 0 (RF output B at minimum power)
_Ti_LMX2581_synth->setOutAPwr(15); // OUTA_PWR = 15 (RF output A power: 0 - minimum, 47 - maximum)
_Ti_LMX2581_synth->setOutBPd(1); // OUTB_PD = 1 (Powered Down)
_Ti_LMX2581_synth->setOutAPd(0); // OUTA_PD = 0 (Normal Operation)
_Ti_LMX2581_synth->setPfdDly(0); // PFD_DLY = 0 (Phase Detector Delay = 370ps)
_Ti_LMX2581_synth->setFlFrce(0); // FL_FRCE = 0 (Fastlock disabled)
_Ti_LMX2581_synth->setFlToc(0); // FL_TOC = 0 (Fastlock disabled)
_Ti_LMX2581_synth->setFlCpg(0); // FL_CPG = 0 (Fastlock Charge Pump Gain: TRI-STATE)
_Ti_LMX2581_synth->setCpgBleed(4); // CPG_BLEED = 4 (Basic user recommendation)
_Ti_LMX2581_synth->setOutLdEn(1); // OUT_LDEN = 1 (Mute RF Outputs A and B based on Lock Detect)
_Ti_LMX2581_synth->setOscFreq(0); // OSC_FREQ = 0 (Foscin < 128 MHz)
_Ti_LMX2581_synth->setBufenDis(1); // BUFEN_DIS = 1 (BUFEN pin ignored)
_Ti_LMX2581_synth->setVcoSelMode(1); // VCO_SEL_MODE = 1 (VCO selection starts at the value specified by VCO_SEL)
_Ti_LMX2581_synth->setOutBMux(1); // OUTB_MUX = 1 (RFoutB = freqVCO/VCO_DIV)
_Ti_LMX2581_synth->setOutAMux(1); // OUTA_MUX = 1 (RFoutA = freqVCO/VCO_DIV)
_Ti_LMX2581_synth->set0Dly(1); // 0_DLY = 1 (Channel Divider output as the Phase Detector input)
_Ti_LMX2581_synth->setMode(0); // MODE = 0 (Full Chip Mode)
_Ti_LMX2581_synth->setPwdnMode(0); // PWDN_MODE = 0 (Powered up)
_Ti_LMX2581_synth->setReset(0); // RESET = 0 (Registers and state machines are operational)
_Ti_LMX2581_synth->setRdAddr(0); // RD_ADDR = 0 (Don't care - Used only for diagnostics)
_Ti_LMX2581_synth->setuWireLock(0); // uWIRE_LOCK = 0 (Normal Operation)
_Ti_LMX2581_synth->setFlPinMode(0); // FL_PINMODE = 0 (TRI_STATE)
_Ti_LMX2581_synth->setMuxoutPinMode(0); // MUXOUT_PINMODE = 0 (TRI_STATE)
_Ti_LMX2581_synth->setLdPinMode(3); // LD_PINMODE = 3 (High Drive Push-Pull)
_Ti_LMX2581_synth->setFlInv(0); // FL_INV = 0 (Normal Operation)
_Ti_LMX2581_synth->setMuxoutInv(0); // MUXOUT_INV = 0 (Normal Operation)
_Ti_LMX2581_synth->setLdInv(0); // LD_INV = 0 (Normal Operation)
_Ti_LMX2581_synth->setFlSel(0); // FL_SELECT = 0 (GND, not used)
_Ti_LMX2581_synth->setMuxoutSel(1); // MUXOUT_SELECT = 1 (Digital Lock Detect - based on phase measurement)
_Ti_LMX2581_synth->setLdSel(4); // LD_SELECT = 4 (Readback)
_Ti_LMX2581_synth->setDldTol(5); // DLD_TOL = 5
_Ti_LMX2581_synth->setVcoCapMan(0); // VCO_CAP_MAN = 0 (Determines initial starting point for VCO calibration)
_Ti_LMX2581_synth->setVcoCapcode(128); // VCO_CAPCODE = 128 (default initial starting point for VCO calibration)
Write Reg 0: 0x60800000
Write Reg 1: 0xF8003011
Write Reg 2: 0x0C000012
Write Reg 3: 0x400003C3
Write Reg 4: 0x00000044
Write Reg 5: 0x0110AC05
Write Reg 6: 0x00000406
Write Reg 7: 0x00020437
Write Reg 8: 0x207DDBF8
Write Reg 9: 0x03C7C039
Write Reg 10: 0x210050CA
Write Reg 11: 0x0000000B
Write Reg 12: 0x0000000C
Write Reg 13: 0x0002C10D
Write Reg 14: 0x0000000E
Write Reg 15: 0x021FE80F
