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CDCM6208 Synchronize clock

masahiko shimizu
Guru 11235 points
Other Parts Discussed in Thread: CDCM6208, CDCM6208V1

Hi

I will try to synchronize Image clock(74.25/1.001MHz，148.5/1.001MHz) and ADC clock(24.576MHz).
I selected CDCM6208.
Can this IC synchronize Image clock and ADC clock?

IC input is 74.25/1.001MHz or 148.5/1.001MHz which is selected by internal resister.
IC output is 24.576MHz.

Best regards,
Shimizu

  • 0
    TI__Mastermind 32575 points

    Thank you for your inquiry.  Someone will review your request and respond to you shortly.

  • 0 in reply to Alan O
    TI__Mastermind 32575 points

    http://e2e.ti.com/cfs-file.ashx/__key/communityserver-discussions-components-files/48/3438.CDCM6208V1_5F00_148.5M_2D00_in_5F00_24.576M_2D00_out.ini

    http://e2e.ti.com/cfs-file.ashx/__key/communityserver-discussions-components-files/48/7418.CDCM6208V1_5F00_148.35M_2D00_in_5F00_24.576M_2D00_out.ini

    Yes, it is possible to synchronize a 24.576 MHz output to either 74.25 MHz (/1.001) or 148.5 MHz (/1.001) using CDCM6208 V1.  It involves using a low PFD frequency and narrow loop bandwidth (~1 kHz) to achieve the PLL frequency translation.

    Attached are the CDCM6208 GUI INI files which configures the registers for either case.  You can load these into the CDCM6208 GUI to see the configurations for 74.25 MHz (or 148.5 MHz) input case, or 74.25 MHz /1.001 or (148.5 MHz  /1.001) input case.

    Regards,
    Alan

  • 0 in reply to Alan O
    Guru 11235 points

    Hi Alan

     Thank you for your support!

    Best regards

    Shimizu