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CDCE62002 - Register programming in power down

Kawai
Guru 19785 points
Other Parts Discussed in Thread: CDCE62002

Hi Team,

Could you please let me ask you about CDCE62002 ?

I have a question from our customer that if the device's register could be programmed when the device is in power down, using /PD pin or /PD bit = Low.


I think that when /PD pin = Low, register cannot be programmed as all hardware is powered down.
However, when /PD pin = High and /PD bit = Low, it  seems to be able to program to the register.

Please let me confirm the operation of this device.

Best Regards,
Takushi Kawai

  • 0
    TI__Mastermind 24205 points

    Hi Kawai-San,

    The SPI port will be active in either case. See page 23 of the CDCE62002 datasheet.

    Regards

    Arvind Sridhar

  • 0 in reply to Arvind Sridhar
    Guru 19785 points

    Hello Arvind-san,

    Thank you for the answer.
    I also understood that the device register setting will not return to the default value even if you power down the device through /PD pin or /PD bit.

    Best Regards,
    Kawai

  • 0 in reply to Kawai
    TI__Mastermind 24205 points

    Hi Kawai-San,

    Powering down the device through the PD pin or bit will not reset the registers but the registers will reset to default values upon exiting power down state. In the event that PD pin is used to power down the device, deasserting this pin will cause the registers to reset to their default values followed by an EEPROM load (if SPI_LE is high)

    Regards

    Arvind Sridhar

  • 0 in reply to Arvind Sridhar
    Guru 19785 points

    Hello Arvind-san,

    Thank you for the answer, it helped me very much.

    Please let me confirm one more thing.

    As there is an EEPROM load function when de-asserting /PD pin, the register program during /PD pin = Low would have no effect.

    However, I believe the register programmed value during in power down mode when /PD pin = High and /PD Bit = 0 would be valid even after de-asserting /PD bit, because there is no EEPROM load function when de-asserting the /PD Bit.  Am I correct ?

    Thanks and Best Regards,
    Kawai

  • 0 in reply to Kawai
    TI__Mastermind 24205 points

    Hi Kawai-San,

    Correct  - EEPROM loading will overwrite the register values

    In the second case (PD bit = 0 and subsequently PD bit = 1), the registers will get reset to silicon default values. The EEPROM content will not get loaded into the active reigsters. The PD bit functions as software reset. Desired values can be written to the EEPROM or active registers via SPI when PD bit is 0

    Regards

    Arvind Sridhar

     

  • 0 in reply to Arvind Sridhar
    Guru 19785 points

    Hi Arvind-san,

    Thank you for your prompt reply.

    I've understood that there is always a soft reset (Power ON Reset) when exiting from power down mode.
    I thought the operation may be different as there were no description of /PD bit in the "Device State Definition" table.

    I think you have typo in the last sentence in your answer.
    I believe, the desired register value could be written to the EEPROM or the active registers via SPI when /PD bit is "1".

    I greatly appreciate to your support.

    Best Regards,
    Kawai

  • 0 in reply to Kawai
    TI__Mastermind 24205 points

    Hi Kawai-San,

    EEPROM / Registers can be written to regardless of the state of the PD pin since the SPI port is active when PD pin is low or high. The updated EEPROM will be loaded into the active registers when Power Down is exited and SPI_LE signal is high.

    Regards

    Arvind Sridhar

     

  • 0 in reply to Arvind Sridhar
    Guru 19785 points

    Hi Arvind-san,

    Thanks for the explanation. I appreciate to your great support.

    Best Regards,
    Kawai