What is the lowest achievable skew and jitter for a large clock tree, which needs to drive 288 devices? Synchronization between the devices is the most critical part of the system, so every picosecond of skew or jitter affects performance. Getting to below 50ps or better is a target. The clock frequency is not as important, with a few hundred MHz up to low GHz are all OK.
Stability over time is also important. Voltage and case temperature can be tightly controlled,
Thanks a lot
